Superlattice lateral bipolar junction transistor
A bipolar junction transistor includes an intrinsic base formed on a substrate. The intrinsic base includes a superlattice stack including a plurality of alternating layers of semiconductor material. A collector and emitter are formed adjacent to the intrinsic base on opposite sides of the base. An extrinsic base structure is formed on the intrinsic base.
1. A method for forming a bipolar junction transistor, comprising:
patterning an extrinsic base on a superlattice stack including a plurality of alternating layers of semiconductor material on a substrate;
etching an intrinsic base in the superlattice stack; and
growing a collector and emitter adjacent to the intrinsic base on opposite sides of the intrinsic base.
2. The method as recited in claim 1 , wherein the superlattice stack includes alternating layers of Si and Ge.
3. The method as recited in claim 1 , wherein the superlattice stack is deposited on a strained semiconductor layer.
4. The method as recited in claim 3 , further comprising adjusting a mass variance to increase thermal conductivity of the strained semiconductor layer by isotope enrichment of the strained semiconductor layer.
5. The method as recited in claim 1 , further comprising adjusting a mass variance to increase thermal conductivity of the superlattice stack by isotope enrichment of the superlattice stack.
6. The method as recited in claim 1 , wherein the superlattice stack includes alternating materials in the alternating layers.
7. The method as recited in claim 1 , wherein the substrate is an extremely thin semiconductor-on-insulator (ETSOI) substrate.
8. The method as recited in claim 7 , wherein a semiconductor layer of the ETSOI substrate forms a layer of the superlattice stack.
9. The method as recited in claim 1 , wherein the alternating layers are lattice mismatched to each other.