Vertical semiconductor device with improved ruggedness
A vertical semiconductor device includes a substrate, a buffer layer over the substrate, and a drift layer over the buffer layer. The substrate has a first doping type and a first doping concentration. The buffer layer has the first doping type and a second doping concentration that is less than the first doping concentration. The drift layer has the first doping type and a third doping concentration that is less than the second doping concentration.
1. A vertical semiconductor device comprising:
a substrate having a first doping type and a first doping concentration;
a buffer layer on the substrate, the buffer layer having the first doping type and a second doping concentration that is less than the first doping concentration; and
a drift layer on the buffer layer, the drift layer having the first doping type and a third doping concentration that is less than the second doping concentration, wherein the substrate, the buffer layer, and the drift layer comprise silicon carbide and a doping profile of the buffer layer provides a linear transition in doping concentration from the third doping concentration to the second doping concentration and back to the third doping concentration.
2. The vertical semiconductor device of claim 1 wherein the buffer layer has a thickness that is between 5% and 35% a thickness of the drift layer.
3. The vertical semiconductor device of claim 1 wherein a second breakdown voltage of the vertical semiconductor device is greater than an avalanche breakdown voltage of the vertical semiconductor device.
4. The vertical semiconductor device of claim 1 further comprising:
a p-layer over the drift layer opposite the buffer layer;
an anode over the p-layer opposite the drift layer; and
a cathode on the substrate opposite the buffer layer.
5. The vertical semiconductor device of claim 1 further comprising:
an anode over the drift layer opposite the buffer layer; and
a cathode on the substrate opposite the buffer layer.
6. The vertical semiconductor device of claim 5 further comprising one or more Schottky barrier regions in the drift layer opposite the buffer layer, the one or more Schottky barrier regions having a second doping type which is opposite the first doping type.
7. The vertical semiconductor device of claim 1 further comprising:
a pair of junction implants in the drift layer opposite the buffer layer;
a gate oxide layer over a portion of the pair of junction implants;
a gate contact over the gate oxide layer;
a source contact over a portion of the pair of junction implants; and
a drift contact on the substrate opposite the buffer layer.
8. A method comprising:
providing a substrate, the substrate having a first doping type and a first doping concentration;
providing a buffer layer over the substrate, the buffer layer having the first doping type and a second doping concentration that is less than the first doping concentration; and
providing a drift layer over the buffer layer, the drift layer having the first doping type and a third doping concentration that is less than the second doping concentration, wherein the substrate, the buffer layer, and the drift layer comprise silicon carbide and a doping profile of the buffer layer provides a linear transition in doping concentration from the third doping concentration to the second doping concentration and back to the third doping concentration.
9. The method of claim 8 wherein providing the buffer layer over the substrate comprises epitaxially growing the buffer layer in an environment with one or more dopants to create a desired doping profile of the buffer layer.
10. The method of claim 8 wherein providing the buffer layer over the substrate comprises:
epitaxially growing the buffer layer; and
performing ion implantation on the buffer layer to create a desired doping profile.
11. The method of claim 8 wherein the buffer layer has a thickness that is between 5% and 35% a thickness of the drift layer.
12. The method of claim 8 wherein the buffer layer is provided such that a second breakdown voltage of a vertical semiconductor device is greater than an avalanche breakdown voltage of the vertical semiconductor device.
13. The vertical semiconductor device of claim 1 wherein a portion of the drift layer is between the buffer layer and the substrate.
14. The method of claim 8 wherein the drift layer and the buffer layer are provided such that a portion of the drift layer is between the buffer layer and the substrate.