Methods of programming memories having a shared resistance variable material

1. A method for programming data to an array of memory cells, wherein the array of memory cells comprise a first memory cell, a second memory cell that is adjacent to the first memory cell in a first direction along a first axis, and a third memory cell that is adjacent to the first memory cell in a second direction along a second axis, wherein the first and third memory cells are back-to-back memory cells that share a same chalcogenide material area that is not cut, the method comprising programming the data to the first and the third memory cells.

2. The method of claim 1 , wherein the chalcogenide material is GeSbTe.

3. The method of claim 1 , wherein the chalcogenide material is formed in a bit line direction.

4. The method of claim 1 , wherein the first and second memory cells are separated by a first distance in the first direction along the first axis, and wherein the back-to-back first and third memory cells that are separated by a second distance, less than the first distance, in the second direction along the second axis.

5. The method of claim 4 , wherein the first axis and the second axis are a same axis in a direction of a data line coupled to each of the first memory cell, the second memory cell and the third memory cell.

6. The method of claim 1 , wherein programming the data to the first and the third memory cells comprises programming a particular bit of data of a plurality of bits of data to the first memory cell, and programming a different bit of data of the plurality of bits of data to the third memory cell.

7. A method for programming data to an array of memory cells, wherein the array of memory cells comprise a first memory cell, a second memory cell that is adjacent to the first memory cell in a first direction along an axis, and a third memory cell that is adjacent to the first memory cell in a second direction along the axis that is opposite the first direction, wherein the first memory cell and the second memory cell are separated by a first distance along the axis and the first memory cell and the third memory cell are separated by a second distance, less than the first distance, along the axis, and wherein the first memory cell, the second memory cell and the third memory cell share a same chalcogenide material area that is not cut, the method comprising:

determining that a first bit of data of a plurality of bits of data is to be programmed and that a second bit of data of the plurality of bits of data is not to be programmed, wherein the first bit of data is located in a particular bit location of the plurality of bits of data and the second bit of data is located in a different bit location of the plurality of bits of data adjacent to the particular bit location;

replacing the second bit of data in the different bit location with a third bit of data of the plurality of bits of data that is to be programmed; and

programming the first bit of data to the first memory cell and programming the third bit of data to the third memory cell.

8. The method of claim 7 , wherein programming the first bit of data to the first memory cell and programming the third bit of data to the third memory cell comprises heating a portion of the chalcogenide material corresponding to each of the first memory cell and the third memory cell to a melting point of the chalcogenide material.

9. A method for programming data to an array of memory cells, wherein the array of memory cells comprise a first memory cell, a second memory cell that is adjacent to the first memory cell in a first direction along an axis, and a third memory cell that is adjacent to the first memory cell in a second direction along the axis that is opposite the first direction, wherein the first memory cell and the second memory cell are separated by a first distance along the axis and the first memory cell and the third memory cell are separated by a second distance, less than the first distance, along the axis, and wherein the first memory cell, the second memory cell and the third memory cell share a same chalcogenide material area that is not cut, the method comprising:

receiving a data word comprising a plurality of bits of data;

determining that a first bit of data of the data word is to be programmed and that a second bit of data of the data word is not to be programmed, wherein the first bit of data is located in a particular bit location of the plurality of bits of data of the data word and the second bit of data is located in a different bit location of the plurality of bits of data of the data word adjacent to the particular bit location;

remapping the data word comprising replacing the second bit of data in the different bit location of the plurality of bits of data of the data word with a third bit of data of the data word that is to be programmed; and

programming the first bit of data to the first memory cell and programming the third bit of data to the third memory cell.

10. The method of claim 9 , further comprising tracking the replacement of the second bit of data with the third bit of data.

11. The method of claim 9 , wherein remapping the data word further comprises remapping the plurality of bits of data of the data word into a first plurality of bit pairs, wherein each bit of data of each bit pair of the first plurality of bit pairs is to be programmed.

12. The method of claim 11 , wherein programming the first bit of data to the first memory cell and programming the third bit of data to the third memory cell comprising programming the first bit of data to the first memory cell of a plurality of memory cells and programming the third bit of data to the third memory cell of the plurality of memory cells.

13. The method of claim 12 , wherein the plurality of memory cells comprises a first plurality of memory cell pairs whose memory cells are separated by the first distance along the axis and a second plurality of memory cell pairs whose memory cells are separated by the second distance along the axis, the method further comprising programming bit pairs of the first plurality of bit pairs to respective memory cell pairs of the second plurality of memory cell pairs.

14. The method of claim 9 , wherein remapping the data word comprises moving a bit of data of the plurality of bits of data of the data word to a bit location of a remapped data word different than its bit location in the plurality of bits of data of the data word.

15. The method of claim 14 , wherein moving the bit of data of the plurality of bits of data of the data word to the bit location of the remapped data word different than its bit location in the plurality of bits of data of the data word comprises moving a bit of data of the plurality of bits of data of the data word that is to be programmed, and wherein the bit location of that bit of data of the plurality of bits of data of the data word corresponds to a bit location of the data word containing a bit of data of the plurality of bits of data of the data word that is not to be programmed.

16. The method of claim 9 , wherein programming the bit pairs of the first plurality of bit pairs to respective memory cell pairs of the second plurality of memory cell pairs comprises changing a resistance of the chalcogenide material for each memory cell of their respective memory cell pairs.

17. The method of claim 9 , wherein programming the bit pairs of the first plurality of bit pairs to respective memory cell pairs of the second plurality of memory cell pairs comprises enabling a respective heater for each memory cell of their respective memory cell pairs.

18. The method of claim 17 , wherein enabling the respective heater for each memory cell of their respective memory cell pairs comprises concurrently enabling the respective heater for each memory cell of their respective memory cell pairs.

19. The method of claim 9 , wherein remapping the data word further comprises changing a bit order of the plurality of bits of data of the data word.

20. The method of claim 19 , wherein changing the bit order of the plurality of bits of data of the data word comprises moving a bit of data of the plurality of bits of data of the data word that is to be programmed to a bit location of the plurality of bits of data of the data word containing a bit of data of the plurality of bits of data of the data word that is not to be programmed.