Memory die temperature adjustment based on a power condition
View Patent ↗A device includes a memory device and a controller. The controller is coupled to the memory device. The controller is configured to, in response to receiving a request to perform a memory access at the memory device, determine that the memory device has a characteristic indicative of a temperature crossing. The controller is also configured to, in response to determining that the memory device has the characteristic indicative of the temperature crossing, determine that the memory device satisfies an availability criterion. The controller is further configured to, in response to determining that the memory device satisfies the availability criterion, increase a temperature of the memory device by performing memory operations on the memory device until detecting a condition related to the temperature.
1. A data storage device, comprising:
a memory device; and
a controller coupled to the memory device, the controller including:
a temperature crossing engine, wherein the temperature crossing engine is configured to reduce a bit-error rate associated with reading data;
an interface; and
memory.
2. The data storage device of claim 1 , wherein the temperature crossing engine is configured to perform memory operations.
3. The data storage device of claim 2 , wherein the temperature crossing engine is configured to determine whether a temperature of the memory device is less than a first temperature threshold.
4. The data storage device of claim 3 , wherein the temperature crossing engine further includes an availability detector.
5. The data storage device of claim 4 , wherein availability detector is configured to determine whether the memory device satisfies an availability condition.
6. The data storage device of claim 5 , wherein the availability detector is configured to determine an availability metric.
7. The data storage device of claim 6 , wherein the availability metric is an indication of power demand.
8. The data storage device of claim 6 , wherein the availability metric is an indication of a number of concurrent read or write operations.
9. The data storage device of claim 6 , wherein the availability metric is an indication of a number of inactive dies of the memory device.
10. The data storage device of claim 1 , wherein the temperature crossing engine is configured to heat the memory device.
11. A method, comprising:
checking a die temperature;
determining that a temperature crossing condition is met;
determining that an availability criteria is met; and
performing a memory operation.
12. The method of claim 11 , wherein performing a memory operation includes heating a memory device.
13. The method of claim 11 , wherein determining that an availability criteria is met includes determining that a power demand is less than a power threshold.
14. The method of claim 11 , wherein determining that an availability criteria is met includes determining that a number of inactive dies is greater than an active die threshold.
15. The method of claim 11 , wherein determining that an availability criteria is met includes determining that an activity level is less than an activity threshold.
16. A data storage device, comprises:
a memory device; and
a controller coupled to the memory device, the controller including:
means to reduce a bit-error rate associated with reading data.
17. The data storage device of claim 16 , further comprising means to heat a memory die.
18. The data storage device of claim 17 , further comprising:
means to determine that a power demand is less than a power threshold;
means to determine that a number of inactive dies is greater than an active die threshold; and
means to determine that an activity level is less than an activity threshold.
19. The data storage device of claim 16 , further comprising:
means to determine whether a temperature of the memory device is less than a first temperature threshold.
20. The data storage device of claim 16 , further comprising means to determine whether the memory device satisfies an availability condition.