IP Library Granted Patent US 10,283,705
Granted Patent B2
US 10,283,705 · App. 15/915,861 · Granted May 7, 2019

Memory cells, semiconductor devices including the memory cells, and methods of operation

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Quick Facts
Patent No.
US 10,283,705
App. No.
15/915,861
Granted
May 7, 2019
Kind
B2
Abstract

Memory cells are disclosed, which cells include a cell material and an ion-source material over the cell material. A discontinuous interfacial material is included between the cell material and the ion-source material. Also disclosed are fabrication methods and semiconductor devices including the disclosed memory cells.

Claims (29)

1. A memory cell, comprising:

an ion-source material over a cell material; and

a discontinuous interfacial material between the cell material and the ion-source material, the discontinuous interfacial material comprising atoms adherent to the cell material and adjacent atoms of the discontinuous interfacial material spaced by a distance greater than or equal to a diameter of ions of the ion-source material, and the discontinuous interfacial material on less than about 40% of a total available surface area of the cell material.

2. The memory cell of claim 1 , wherein the discontinuous interfacial material comprises interfacial complexes laterally spaced from one another.

3. The memory cell of claim 2 , wherein the interfacial complexes are between the cell material and the ion-source material.

4. The memory cell of claim 2 , wherein each of the interfacial complexes comprises an adherent atom and another atom.

5. The memory cell of claim 4 , wherein the adherent atom is bonded to the cell material and the another atom is bonded to at least one atom of the ion-source material.

6. The memory cell of claim 4 , wherein the adherent atom is bonded to the cell material and to the ion-source material.

7. The memory cell of claim 1 , wherein the ion-source material comprises copper or silver.

8. A memory cell, comprising:

an ion-source material over a cell material, the cell material comprising a chalcogenide material; and

a discontinuous interfacial material between the cell material and the ion-source material, the discontinous interfacial material comprising atoms adherent to the cell material and adjacent atoms of the discontinuous interfacial material spaced by a distance greater than or equal to a diameter of ions of the ion-source.

9. The memory cell of claim 8 , further comprising a first electrode and a second electrode in operative communication with the cell material and the ion-source material.

10. The memory cell of claim 9 , wherein a filament comprising metal atoms of the ion-source material electroconductively connects the first electrode and the second electrode.

11. The memory cell of claim 9 , wherein a filament comprising metal atoms of the ion-source material electroconductively connects the first electrode and the ion-source material.

12. The memory cell of claim 9 , wherein a filament extends through the discontinuous interfacial material.

13. The memory cell of claim 8 , wherein the ion-source material comprises a copper-containing material or a silver-containing material.

14. The memory cell of claim 8 , wherein the discontinuous interfacial material is on less than about 60% of a total available surface area of the cell material.

15. The memory cell of claim 8 , wherein the discontinuous interfacial material is on only a portion of the cell material.

16. A method of operating a semiconductor device comprising:

applying a voltage to a semiconductor device comprising memory cells, at least one of the memory cells comprising an ion-source material over a cell material; and

diffusing ions from the ion-source material through a discontinuous interfacial material between the cell material and the ion-source material to form at least one conductive path between a first electrode and the ion-source material, the diffusing comprising oxidizing metal atoms of the ion-source material, diffusing the oxidized metal atoms through the discontinous interfacial material, and reducing the oxidized metal atoms at the first electrode, the discontinuous interfacial material comprising atoms adherent to the cell material and adjacent atoms of the discontinuous interfacial material spaced by a distance greater than or equal to a diameter of the ions of the ion-source material.

17. The method of claim 16 , wherein diffusing ions from the ion-source material through a discontinuous interfacial material comprises forming the at least one conductive path between the first electrode and a second electrode.

18. The method of claim 16 , further comprising removing the voltage from the semiconductor device.

19. A method of operating a semiconductor device comprising:

applying a voltage to a semiconductor device comprising memory cells, at least one of the memory cells comprising an ion-source material over a cell material;

diffusing ions from the ion-source material through a discontinous interfacial material between the cell material and the ion-source material to form at least one conductive path between a first electrode and the ion-source material, the discontinuous interfacial material comprising atoms adherent to the cell material and adjacent atoms of the discontinous interfacial material spaced by a distance greater than or equal to a diameter of the ions of the ion-source material; and

reversing a polarity of the voltage to dissipate the at least one conductive path.

20. The method of claim 19 , wherein diffusing ions from the ion-source material through a discontinuous interfacial material comprises diffusing metal ions through the discontinuous interfacial material.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050709/0965 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
SUPPLEMENT NO. 8 TO PATENT SECURITY AGREEMENT Recorded May 7, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 046084/0955 →