Assemblies comprising memory cells and select gates
View Patent ↗An assembly having a stack of alternating dielectric levels and conductive levels. Channel material pillars extend through the stack. Some of the channel material pillars are associated with a first sub-block, and others of the channel material pillars are associated with a second sub-block. Memory cells are along the channel material pillars. An insulative level is over the stack. A select gate configuration is over the insulative level. The select gate configuration includes a first conductive gate structure associated with the first sub-block, and includes a second conductive gate structure associated with the second sub-block. The first and second conductive gate structures are laterally spaced from one another by an intervening insulative region. The first and second conductive gate structures have vertically-spaced conductive regions, and have vertically-extending conductive structures which electrically couple the vertically-spaced conductive regions to one another.
1. An assembly, comprising:
a first stack comprising alternating first dielectric levels and first conductive levels;
a first conductive liner surrounding each of the first conductive levels, the first conductive liner comprising electrically conductive material;
an insulative level over the first stack;
a select gate configuration over the insulative level; the select gate configuration including a second stack comprising alternating second dielectric levels and second conductive levels;
channel material pillars extending through the first stack and into the second stack; some of the channel material pillars being associated with a first sub-block and others of the channel material pillars being associated with a second sub-block;
memory cells along the channel material pillars;
an opening extending through the second stack, but not entirely through the insulative level; the opening, along a cross-section, having a first side and an opposing second side;
a first conductive lining along the first side of the opening and coupling the second conductive levels along the first side of the opening into a first select gate for the first sub-block; and
a second conductive lining along the second side of the opening and coupling the second conductive levels along the second side of the opening into a second select gate for the second sub-block.
2. The assembly of claim 1 wherein the memory cells are NAND memory cells.
3. The assembly of claim 1 wherein the opening penetrates into the insulative level.
4. The assembly of claim 1 wherein the first and second conductive linings are a same composition as one another.
5. The assembly of claim 4 wherein the first and second conductive linings comprise metal.
6. The assembly of claim 4 wherein the first and second conductive linings comprise tungsten.
7. The assembly of claim 1 wherein insulative material is within the opening between the first and second conductive linings.
8. The assembly of claim 1 wherein the second dielectric levels comprise one or more high-k oxides.
9. The assembly of claim 1 wherein the second dielectric levels comprise silicon dioxide.
10. The assembly of claim 1 wherein the memory cells comprise charge-blocking material, and wherein the second dielectric levels comprise a same composition as the charge-blocking material.
11. The assembly of claim 1 further comprising a second liner surrounding each of the second conductive levels.
12. The assembly of claim 11 wherein the second liner comprises conductive material.
13. The assembly of claim 12 wherein the conductive material of the second liner comprises a composition different from a composition of the second conductive levels.
14. The assembly of claim 11 wherein the second liner comprises a single structure of material and contacts at least two different sides of each of the second conductive levels.
15. The assembly of claim 14 wherein the at least two different sides of the second conductive levels are connected.
16. The assembly of claim 1 wherein the conductive material of the first conductive liner comprises a composition different from a composition of the first conductive levels.
17. The assembly of claim 1 wherein the first conductive liner comprises a single structure of material.
18. The assembly of claim 17 wherein the first conductive liner contacts at least two different sides of each of the first conductive levels.
19. The assembly of claim 18 wherein the at least two different sides of the first conductive levels are connected.
20. An assembly, comprising:
a first stack comprising alternating first dielectric levels and first conductive levels;
a gate level within at least two of the first dielectric levels;
a liner comprising a single structure of material and contacting at least two different sides of the gate level;
an insulative level over the first stack;
a select gate configuration over the insulative level; the select gate configuration including a second stack comprising alternating second dielectric levels and second conductive levels;
channel material pillars extending through the first stack and into the second stack; some of the channel material pillars being associated with a first sub-block and others of the channel material pillars being associated with a second sub-block;
memory cells along the channel material pillars;
an opening extending through the second stack, but not entirely through the insulative level; the opening, along a cross-section, having a first side and an opposing second side;
a first conductive lining along the first side of the opening and coupling the second conductive levels along the first side of the opening into a first select gate for the first sub-block;
a second conductive lining along the second side of the opening and coupling the second conductive levels along the second side of the opening into a second select gate for the second sub-block; and
wherein the liner contacts at least three different sides of the gate level.
21. The assembly of claim 20 wherein the gate level comprises a first conductive composition and a second conductive composition different from the first conductive composition.
22. The assembly of claim 20 wherein the gate level comprises:
a core of conductive material; and
wherein the liner comprises conductive material surrounding the core.
23. The assembly of claim 22 wherein the conductive material of the core is different from the conductive material of the liner.
24. The assembly of claim 20 wherein the at least two different sides of the gate level are connected.
25. The assembly of claim 20 wherein the at least three different sides of the gate level are serially connected.
26. An assembly, comprising:
a first stack comprising alternating first dielectric levels and first conductive levels;
a first conductive liner surrounding each of the first conductive levels;
an insulative level over the first stack;
a select gate configuration over the insulative level; the select gate configuration including a second stack comprising alternating second dielectric levels and second conductive levels;
channel material pillars extending through the first stack and into the second stack; some of the channel material pillars being associated with a first sub-block and others of the channel material pillars being associated with a second sub-block;
memory cells along the channel material pillars;
an opening extending through the second stack, but not entirely through the insulative level; the opening, along a cross-section, having a first side and an opposing second side;
a first conductive lining along the first side of the opening and coupling the second conductive levels along the first side of the opening into a first select gate for the first sub-block;
a second conductive lining along the second side of the opening and coupling the second conductive levels along the second side of the opening into a second select gate for the second sub-block;
a second liner surrounding each of the second conductive levels; and
wherein the second liner comprises a single structure of material and contacts at least two different sides of each of the second conductive levels.
27. The assembly of claim 26 wherein the first conductive liner is electrically conductive.