Method and structure for forming dielectric isolated FinFET with improved source/drain epitaxy
View Patent ↗Described herein is a FinFET device in which epitaxial layers of semiconductor material are formed in the source/drain regions on dielectrically isolated fin portions. The fin portions are located within a dielectric layer that is deposited on a semiconductor substrate. Surfaces of the fin portions are oriented in the {100} lattice plane of the crystalline material of the fin portions, providing for good epitaxial growth. Further described are methods for forming the FinFET device.
1. A method for forming a field effect transistor (FinFET) device, comprising:
oxidizing lower portions of semiconductor fins in a dielectric layer contacting the lower portions;
annealing to remove upper portions of the fins above fin portions within the dielectric layer, the fin portions within the dielectric layer being dielectrically isolated from each other by the dielectric layer; and
forming epitaxial semiconductor material on seed surfaces of the fin portions that are within the dielectric layer.
2. The method of claim 1 , wherein the epitaxial semiconductor material includes source/drain regions and further comprising forming a gate structure between the source/drain regions.
3. The method of claim 2 , wherein the forming of the gate structure comprises forming a sacrificial gate structure on the device prior to annealing; and
replacing the sacrificial gate structure with a metal gate structure after forming the epitaxial semiconductor material.
4. The method of claim 3 , further comprising forming an insulating layer comprising a high dielectric constant material around the metal gate structure.
5. The method of claim 1 , wherein the fins are formed from a semiconductor substrate by selectively removing material from the semiconductor substrate in a fin-forming pattern.
6. The method of claim 1 , wherein the annealing is conducted in an atmosphere comprising a hydrogen gas selected from the group consisting of hydrogen, deuterium and a combination of hydrogen and deuterium.
7. The method of claim 1 , wherein the seed surfaces of the fin portions are oriented in the {100} lattice plane.
8. A method for forming a field effect transistor (FinFET) device, comprising:
forming fins from a semiconductor substrate;
oxidizing a lower portion of the fins in contact with a dielectric layer while upper portions of the fins are protected;
exposing the upper portions of the fins;
annealing to remove the upper portions of the fins above fin portions within the dielectric layer, the fin portions within the dielectric layer being dielectrically isolated from each other by the dielectric layer; and
forming epitaxial semiconductor material on seed surfaces of the fin portions that are within the dielectric layer.
9. The method of claim 8 , wherein the epitaxial semiconductor material includes source/drain regions and further comprising forming a gate structure between the source/drain regions.
10. The method of claim 9 , wherein the forming of the gate structure comprises forming a sacrificial gate structure on the device prior to annealing; and
replacing the sacrificial gate structure with a metal gate structure after forming the epitaxial semiconductor material.
11. The method of claim 10 , further comprising forming an insulating layer comprising a high dielectric constant material around the metal gate structure.
12. The method of claim 8 , wherein the fins are formed from the semiconductor substrate by selectively removing material from the semiconductor substrate in a fin-forming pattern.
13. The method of claim 8 , wherein the annealing is conducted in an atmosphere comprising a hydrogen gas selected from the group consisting of hydrogen, deuterium and a combination of hydrogen and deuterium.
14. The method of claim 8 , wherein the seed surfaces of the fin portions are oriented in the {100} lattice plane.