Granted Patent B2

US 10,643,732 · App. 15/933,209 · Granted May 5, 2020

Abstract

Claims (57)

1. A method for testing an interface between a first electrical circuit and a second electrical circuit, comprising:

transmitting a data pattern on at least a first line from the first electrical circuit to the second electrical circuit at a transmitting frequency;

receiving the transmitted data pattern as a received data pattern at the second electrical circuit;

increasing a value of a counter by one, the counter counting a number of times data patterns have been transmitted from the first electrical circuit to the second electrical circuit during the testing;

comparing the received data pattern at the second electrical circuit to an expected data pattern stored in the second circuit to obtain a result;

decreasing a first value of the transmitting frequency to an augmented transmitting frequency having a second value different from the first value when the result indicates that the expected data pattern is different than the received data pattern;

increasing the first value of the transmitting frequency to an augmented transmitted frequency having a third value different from the first value when the result indicates that the expected data pattern on the first lino is not different than the received data pattern;

determining if the counter has reached a threshold limit;

setting the augmented frequency having the second value or the third value as the transmitting frequency when the counter has not reached the threshold limit;

reporting the augmented transmitted frequency to the first electrical circuit when the counter has reached the threshold limit to complete the testing of the interface; and

reconfiguring the first electrical circuit to send subsequent data on the at least the first line at the augmented transmitting frequency.

2. The method according to claim 1 , wherein the first electrical circuit is at least one of an application specific integrated circuit and a flash interface module.

3. The method according to claim 2 , wherein the application specific integrated circuit sends the data pattern to a flash interface module.

4. The method according to claim 1 , wherein the second electrical circuit is flash memory.

5. The method according to claim 1 , further comprising:

reporting the result to the first electrical circuit.

6. The method according to claim 1 , wherein the expected data pattern is identical to the data pattern on the first line.

7. The method according to claim 1 , wherein the threshold limit is ten.

8. The method according to claim 1 , wherein the at least the first line is fourteen lines.

9. The method according to claim 1 , wherein the first electrical circuit is a host computer and the second electrical circuit is a host interface module.

10. The method according to claim 9 , wherein the host computer records the augmented transmitting frequency.

11. The method according to claim 1 , wherein the decreasing the value of the transmitting frequency is performed in a standardized step value.

12. The method according to claim 1 , wherein the increasing the value of the transmitting frequency is performed in a standardized step value.

13. An arrangement for testing lines between two electrical circuits, comprising:

an application specific integrated circuit configured to send a plurality of data patterns at a transmitting frequency;

an interface module connected to the application specific integrated circuit configured to send the plurality of data patterns at the transmitting frequency;

a flash memory configured with a connection to the interface module, wherein the flash memory is configured to receive a transmitted data pattern as a received data pattern from the application specific integrated circuit, the flash memory having a comparing circuit, wherein the comparing circuit is configured to compare the received data pattern at the flash memory and an expected data pattern stored in the flash memory, and wherein the application specific integrated circuit is configured to adjust the transmitting frequency to an augmented frequency having a different value than the transmitting frequency based on the comparison of the received data pattern to the expected data pattern; and

a counter, wherein the counter counts a number of times the plurality of data patterns have been transmitted from the first electrical circuit to the second electrical circuit during the testing.

14. The arrangement according to claim 13 , wherein the application specific integrated circuit is configured to receive a result from the comparing circuit.

15. The arrangement according to claim 13 , wherein the comparing circuit is configured to calculate a frequency at which a data pattern is configured to be sent by the application specific integrated circuit.

16. The arrangement according to claim 13 , wherein the connection to the interface module comprises at least one line.

17. The arrangement according to claim 16 , wherein the at least one line is fourteen lines.

18. The arrangement according to claim 13 , wherein the interface module is a host interface module.

19. A method for testing a line between a first electrical circuit and a second electrical circuit, comprising:

transmitting a data pattern on the line at a transmitting frequency;

receiving the transmitted data pattern as a received data pattern at the second electrical circuit;

comparing the received data pattern to an expected data pattern by the second electrical circuit, the expected data pattern being stored in the second circuit;

increasing a loop counter by one, the loop counter counting a number of times data patterns have been transmitted from the first electrical circuit to the second electrical circuit during the testing;

decreasing a first value of the transmitting frequency to an augmented transmitting frequency having a second value different than the first value when the expected data pattern is different than the received data pattern;

increasing the first value of the transmitting frequency to an augmented transmitted frequency having a third value different than the first value when the expected data pattern is not different than the received data pattern;

determining if the counter has reached a threshold limit;

setting the augmented frequency having the second value or the third value as the transmitting frequency when the counter has not reached the threshold limit; and

repeating the transmitting of the data pattern on the line at the augmented frequency having the second value or the third value, the receiving of the transmitted data pattern, the comparing of the received data pattern, the increasing the loop counter, the decreasing the value of the transmitting frequency when the expected data pattern is different than the received data pattern, and the increasing the value of the transmitting frequency when the expected data pattern is not different than the received data pattern until the threshold limit is reached for the loop counter.

20. The method according to claim 19 , wherein the threshold for the loop counter is 10.

21. The method according to claim 19 , wherein the second electrical circuit is a flash memory circuit.

22. The method according to claim 19 , wherein the first electrical circuit is a flash interface module.

23. The method according to claim 19 , wherein the decreasing the value of the transmitting frequency is performed in a standardized step value.

24. The method according to claim 19 , wherein the increasing the value of the transmitting frequency is performed in a standardized step value.

25. A method for testing a transmission of a signal between a first electrical circuit and a second electrical circuit, comprising:

transmitting the signal on a line extending between the first electrical circuit and the second electrical circuit at a transmitting frequency;

receiving the transmitted signal as a received pattern at the second electrical circuit;

comparing the received pattern to an expected pattern by the second electrical circuit, the expected pattern being stored in the second electrical circuit;

increasing a loop counter by one, the loop counter counting a number of times signals have been transmitted from the first electrical circuit to the second electrical circuit during the testing;

decreasing a first value of the transmitting frequency to an augmented transmitting frequency having a second value different than the first value when the expected pattern is different than the received pattern;

increasing the first value of the transmitting frequency to an augmented transmitted frequency having a third value different than the first value when the expected pattern is not different than the received pattern;

setting the augmented frequency having the second value or the third value as the transmitting frequency when the counter has not reached a threshold limit; and

repeating the transmitting of the signal on the line at the augmented frequency having the second value or the third value, the receiving of the signal with a second received pattern, the comparing the second received pattern, the increasing the loop counter, the decreasing the value of the transmitting frequency when the expected data pattern is different than the received data pattern, and the increasing the value of the transmitting frequency when the expected data pattern is not different than the received data pattern until the threshold limit is reached for the loop counter.

Assignments (10)