Memory device configuration commands
View Patent ↗Apparatuses and methods for configuring a memory device using configuration commands are provided. A method can include executing a first command while the memory device is in a ready state to configure the memory device to a particular mode and executing a second command to perform a first operation while the memory device is in the particular mode.
1. A method for configuring a memory device, comprising:
executing a command while the memory device is in a ready state to configure the memory device to a particular mode, wherein the particular mode defines a particular programming algorithm.
2. The method of claim 1 , wherein the particular mode defines number of bits stored per memory cell.
3. The method of claim 1 , wherein the method includes executing another command to perform an operation while the memory device is in the particular mode.
4. The method of claim 1 , wherein executing the command to configure the memory device to the particular mode includes configuring the memory device to a single level cell mode.
5. The method of claim 1 , wherein executing the command to configure the memory device to the particular mode includes configuring the memory device to a multi-level cell mode.
6. The method of claim 1 , wherein the method includes executing another command to configure the memory device to another mode different from the particular mode.
7. The method of claim 1 , wherein the method includes executing another command to perform an operation on a first logical unit (LUN) of the memory device while the memory device is in the particular mode.
8. A method for configuring a memory device, comprising:
sending a command to the memory device, wherein the command includes instructions to configure the memory device to a particular mode and the particular mode defines a particular programming algorithm; and
configuring the memory device to the particular mode by executing the command while the memory device is in a ready state.
9. The method of claim 8 , wherein the method includes executing the command without transferring data on a data bus between the memory device and a host.
10. The method of claim 8 , wherein the method includes executing another command to write data to the memory device.
11. The method of claim 8 , wherein the method includes executing another command to read data from the memory device.
12. The method of claim 8 , wherein the method includes executing another command to erase data from the memory device.
13. An apparatus, comprising:
an array of memory cells of a memory device; and
a controller coupled to the array of memory cells, the controller configured to:
execute a first command to configure the memory device to a particular mode while the memory device is in a ready state, wherein the particular mode defines a particular programming algorithm; and
execute a second command to perform while the memory device is in the particular mode.
14. The apparatus of claim 13 , wherein the controller is configured to execute a third command to configure the memory device to another mode different from the particular mode.
15. The apparatus of claim 13 , wherein the particular mode defines a number of bits per cell.
16. The apparatus of claim 13 , wherein the particular programming algorithm is selected from a group including a course programming algorithm, a fine programming algorithm, and a superfine programming algorithm.
17. The apparatus of claim 13 , wherein the first command is not placed in a command queue for execution.
18. The apparatus of claim 13 , wherein execution of the first command does not include a data transfer phase.
19. The apparatus of claim 13 , wherein the second command is a read operation.
20. The apparatus of claim 13 , wherein the second command is a write operation.