IP Library Granted Patent US 10,566,063
Granted Patent B2
US 10,566,063 · App. 15/981,810 · Granted Feb 18, 2020

Memory system with dynamic calibration using a trim management mechanism

Inventors: Michael Sheperek (Longmont, CO); Larry J. Koudele (Erie, CO); Steve Kientz (Westminster, CO)
Assignee: Micron Technology, Inc.
G11C16/26G06F3/0604G06F3/0659G06F3/0679G11C11/5628G11C11/5642G11C11/5671G11C16/0483
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Quick Facts
Patent No.
US 10,566,063
App. No.
15/981,810
Filed
May 16, 2018
Granted
Feb 18, 2020
Kind
B2
Art Unit
2131
USPC
711/103
Abstract

A system comprises a memory device comprising a plurality of memory cells; and a processing device coupled to the memory device, the processing device configured to iteratively: determine a set of read results based on reading a subset of memory cells according to read levels maintained within optimization trim data, wherein the optimization trim data initially comprises at least one read level in addition to a target trim; calibrate the set of read levels based on the set of read results; and remove the calibrated read levels from the optimization trim data when the calibrated read levels satisfy a calibration condition.

Claims (72)

1. A system, comprising:

a memory device comprising a plurality of memory cells; and

a processing device coupled to the memory device, the processing device configured to iteratively:

determine a set of read results based on reading a subset of memory cells according to read levels maintained within optimization trim data, wherein:

the optimization trim data initially comprises at least one read level in addition to a target trim, and

a trim comprises a read level voltage used to read stored information;

calibrate the read levels maintained within optimization trim data based on the set of read results; and

remove the calibrated read levels from the optimization trim data when the calibrated read levels satisfy a calibration condition.

2. The system of claim 1 , wherein the processing device is configured to determine a subsequent set of read results after the target trim satisfies the calibration condition, wherein the subsequent set of the read results are determine based on reading according to the read levels without the target trim.

3. The system of claim 1 , wherein:

the optimization trim data comprises the read levels according to page stacks, wherein each of the page stacks comprise a set of read levels for a corresponding page type; and

the processing device is configured to remove a page stack comprises the target trim when trims within the page stack are calibrated.

4. The system of claim 3 , wherein the processing device is configured to:

individually calibrate the trims within the page stack; and

calibrate the trims within the page stack as a single set after the trims have been individually calibrated.

5. The system of claim 4 , wherein the processing device is configured to calibrate the trims within the page stack as a set by:

determine a set of read results based on reading the subset of memory cells according to the trims within the page stack;

calculating an error measure based on aggregating the set of read results;

determining an adjustment direction based on the error measure; and

adjusting the trims within the page stack according to the adjustment direction until the calibration condition is satisfied.

6. The system of claim 1 , wherein the processing device is configured to calibrate each of the read levels based on:

selecting the target trim as one of the read levels within the optimization trim data;

determining a set of read results based on reading the subset of memory cells using the target trim, an upper read level greater than the target trim, and a lower read level less than the target trim;

calculating a set of error measures corresponding to the set of read results, wherein the set of error measures comprises error measures that correspond to the target trim, the upper read level, and the lower read level;

calculating a first difference measure and a second difference measure based on the set of error measures, wherein the first difference measure is a difference between the error measures of the upper read level and the target trim and the second difference measure is a difference between the error measures of the lower read level and the target trim;

determining an update direction corresponding to lower of the first difference measure and the second difference measure, wherein the update direction is for decreasing the target trim when the first difference measure is lower or for increasing the target trim when the second difference measure is lower; and

adjusting the target trim according to the update direction.

7. The system of claim 6 , wherein the processing device is configured to:

store a previous direction at a previous iteration, wherein the previous direction is the update direction determined at the previous iteration preceding a current iteration;

determine the update direction for the current iteration; and

determine that the target trim satisfies the calibration condition when the update direction for the current iteration differs from the previous direction of the previous iteration.

8. The system of claim 1 , wherein the processing device is configured to remove the target trim based on generating a trim removal indicator for the target trim when the target trim satisfies the calibration condition.

9. The system of claim 1 , wherein the processing device is configured to remove the target trim based on generating a reduced trim data for replacing the optimization trim data, wherein the reduced trim data comprises trims in the optimization trim data without the removed target trim.

10. The system of claim 1 , wherein the processing device is configured to remove the target trim when the target trim satisfies the calibration condition and independent of a calibration status of other read levels within the optimization trim data.

11. A method comprising calibrating read levels in a trim set for a subset of memory cells based on iteratively:

determining a set of read results based on reading a subset of memory cells according to read levels maintained within optimization trim data, wherein:

the optimization trim data initially comprises at least one read level in addition to a target trim, and

a trim comprises a read level voltage used to read stored information;

calibrating the read levels maintained within optimization trim data based on the set of read results; and

removing the calibrated read levels from the optimization trim data when the calibrated read levels satisfy a calibration condition.

12. The method of claim 11 , further comprising, after the target trim satisfies the calibration condition, determining a subsequent set of read results without reading with the target trim.

13. The method of claim 11 , wherein:

the optimization trim data comprises a page stack that includes a set of read levels for a page type, wherein the page stack includes the target trim; and

removing the target trim comprises removing the page stack when the read levels in the page stack are calibrated.

14. The method of claim 13 , wherein calibrating the set of read levels comprises:

individually calibrating the trims within the page stack; and

calibrating the trims within the page stack as a single set after the trims have been individually calibrated.

15. The method of claim 14 , wherein calibrating the trims within the page stack as a single set comprises iteratively:

reading the subset of memory cells according to the trims within the page stack;

calculating an error measure based on aggregating the set of read results;

determining an adjustment direction based on the error measure; and

adjusting the trims within the page stack as a single set according to the adjustment direction until the calibration condition is satisfied.

16. The method of claim 11 , wherein calibrating the set of read levels comprises:

selecting the target trim as one of the read levels within the optimization trim data;

determining a set of read results based on reading the subset of memory cells using the target trim, an upper read level greater than the target trim, and a lower read level less than the target trim;

calculating a set of error measures corresponding to the set of read results, wherein the set of error measures comprises error measures that correspond to the target trim, the upper read level, and the lower read level;

calculating a first difference measure and a second difference measure based on the set of error measures, wherein the first difference measure is a difference between the error measures of the upper read level and the target trim and the second difference measure is a difference between the error measures of the lower read level and the target trim;

determining an update direction corresponding to lower of the first difference measure and the second difference measure, wherein the update direction is for decreasing the target trim when the first difference measure is lower or for increasing the target trim when the second difference measure is lower; and

adjusting the target trim according to the update direction.

17. The method of claim 16 , further comprising:

storing a previous direction at a previous iteration, wherein the previous direction is the update direction determined at the previous iteration preceding a current iteration;

wherein:

determining the update direction comprises determining the update direction for the current iteration; and

removing the target trim comprises removing the target trim when the update direction for the current iteration differs from the previous direction of the previous iteration.

18. The method of claim 11 , wherein:

removing the target trim comprises generating a trim removal indicator for the target trim when the target trim satisfies the calibration condition; and

determining the set of read results comprises ignoring the read level corresponding to the trim removal indicator.

19. The method of claim 11 , wherein:

removing the target trim comprises generating a reduced trim data for replacing the optimization trim data, wherein the reduced trim data includes trims in the optimization trim data without the removed target trim; and

further comprising:

determining a set of subsequent results based on reading the subset of memory cells according to the reduced trim data instead of the optimization trim data after the target trim is calibrated.

20. The method of claim 11 , wherein removing the target trim comprises removing the target trim independent of a calibration status of other read levels within the optimization trim data.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 11, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050713/0001 →
SUPPLEMENT NO. 9 TO PATENT SECURITY AGREEMENT Recorded Aug 9, 2018
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 047282/0463 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 17, 2018
From: SHEPEREK, MICHAEL; KIENTZ, STEVE; KOUDELE, LARRY J.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 045832/0786 →
Continuity (1)
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