IP Library Granted Patent US 10,642,495
Granted Patent B2
US 10,642,495 · App. 16/011,572 · Granted May 5, 2020

Wear leveling in solid state devices

Inventors: Kanishk Rastogi (Maharashtra, IN); Sanoj Kizhakkekara Unnikrishnan (Bangalore, IN); Anand Mitra (Maharashtra, IN)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G06F3/0608G06F3/064G06F3/0616G06F3/0652G06F3/0658G06F3/0679G06F12/0246G06F2212/1036G06F2212/7205G06F2212/7211
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Quick Facts
Patent No.
US 10,642,495
App. No.
16/011,572
Granted
May 5, 2020
Kind
B2
Abstract

Embodiments of the present disclosure provide a memory-efficient mechanism for identifying memory blocks with a low wear count. More particularly, embodiments of the present disclosure provide a mechanism for identifying a memory block whose wear count is within the bottom p % of all wear counts associated with memory blocks in a storage system. If a memory controller performs the garbage collection operation on a memory block whose wear count is within the bottom p % of all wear counts, then the memory controller is expected to utilize the remaining memory blocks (e.g., memory blocks whose wear count is within the upper (100−p) % of all wear counts) efficiently and level the wear count of at least the remaining memory blocks.

Claims (88)

1. A method comprising:

receiving, at a memory controller in a storage system, a request to delete data from the storage system;

determining a wear count value associated with a memory block among a plurality of memory blocks of the storage system;

determining whether the wear count value associated with the memory block satisfies a threshold wear count value; and

in response to determining that the wear count value associated with the memory block satisfies the threshold wear count value:

causing, by the memory controller, deletion of data from the memory block.

2. The method of claim 1 , further comprising

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

selecting a second memory block from the plurality of memory blocks of the storage system;

determining, by the memory controller, whether a wear count value associated with the second memory block satisfies the threshold wear count value; and

in response to determining that the wear count value associated with the second memory block satisfies the threshold wear count value,

causing, by the memory controller, deletion of data from the second memory block.

3. The method of claim 1 , further comprising:

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

determining, by the memory controller, whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that satisfies the threshold wear count value;

in response to determining that the counter satisfies the threshold number of attempts:

selecting randomly, by the memory controller, a second memory block from the plurality of memory blocks of the storage system; and

causing, by the memory controller, deletion of data from the second memory block.

4. The method of claim 1 , further comprising:

updating the wear count value associated with the memory block to an updated wear count value.

5. The method of claim 4 , further comprising:

updating, by the memory controller, the wear count value associated with the memory block to the updated wear count value by increasing the wear count value.

6. The method of claim 4 , further comprising:

identifying, by the memory controller, based on the wear count value, a first wear count element in a data structure;

identifying, by the memory controller, based on the updated wear count value, a second wear count element in the data structure;

determining, by the memory controller, whether the first wear count element and the second wear count element are different; and

in response to determining that the first wear count element and the second wear count element are different:

updating, by the memory controller, based on the updated wear count value, the data structure.

7. The method of claim 6 , wherein the first wear count element is associated with a first range of wear count values and a first number of memory blocks among the plurality of memory blocks of the storage system, and wherein the second wear count element is associated with a second range of wear count values and a second number of memory blocks among the plurality of memory blocks of the storage system.

8. The method of claim 7 , wherein the wear count value is within the first range of wear count values, and the updated wear count value is within the second range of wear count values.

9. The method of claim 7 , further comprising:

updating the data structure by decreasing the first number of memory blocks associated with the first wear count element, and increasing the second number of memory blocks associated with the second wear count element.

10. A storage system comprising:

a plurality of memory blocks; and

a memory controller;

wherein the memory controller is configured to:

receive a request to delete data from the storage system;

determine a wear count value associated with a memory block among a plurality of memory blocks of the storage system;

determine whether the wear count value associated with the memory block satisfies a threshold wear count value; and

when the wear count value is determined to be associated with the memory block satisfies the threshold wear count value,

update the wear count value associated with the memory block to an updated wear count value, and

cause deletion of data from the memory block.

11. The storage system of claim 10 , wherein the memory controller is configured to:

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

select a second memory block from the plurality of memory blocks;

determine whether a wear count value associated with the second memory block satisfies the threshold wear count value; and

in response to determining that the wear count value associated with the second memory block satisfies the threshold wear count value:

cause deletion of data from the second memory block.

12. The storage system of claim 10 , wherein the memory controller is configured to:

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

determine whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that satisfies the threshold wear count value; and

in response to determining that the counter satisfies the threshold number of attempts:

select a second memory block from the plurality of memory blocks; and

cause deletion of data from the second memory block.

13. The storage system of claim 10 , wherein the memory controller is configured to increase the wear count value to update the wear count value to the updated wear count value.

14. The storage system of claim 10 , wherein the memory controller is configured to:

identify, based on the wear count value, a first wear count element in a data structure;

identify, based on the updated wear count value, a second wear count element in the data structure;

determine whether the first wear count element and the second wear count element are different; and

in response to determining that the first wear count element and the second wear count element are different, update the data structure.

15. The storage system of claim 14 , wherein the first wear count element is associated with a first one or more wear count values and a first number of memory blocks among the plurality of memory blocks of the storage system, and wherein the second wear count element is associated with a second one or more wear count values and a second number of memory blocks among the plurality of memory blocks.

16. The storage system of claim 15 , wherein the wear count value is one of the first one or more wear count values, and the updated wear count value is one of the second one or more wear count values.

17. The storage system of claim 15 , wherein the memory controller is configured to:

decrease the first number of memory blocks associated with the first wear count element, and increase the second number of memory blocks associated with the second wear count element, to update the data structure.

18. A system comprising:

means for receiving a request to delete data from a storage system;

means for determining a wear count value associated with a memory block among a plurality of memory blocks of the storage system;

means for determining whether the wear count value associated with the memory block satisfies a threshold wear count value;

in response to determining that the wear count value associated with the memory block satisfies the threshold wear count value:

means for updating the wear count value associated with the memory block to an updated wear count value by increasing the wear count value; and

means for causing deletion of data from the memory block.

19. The system of claim 18 , further comprising:

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

means for determining whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count value that satisfies the threshold wear count value; and

in response to determining that the counter satisfies the threshold number of attempts:

means for selecting randomly a second memory block from the plurality of memory blocks of the storage system; and

means for causing deletion of data from the second memory block.

20. A non-transitory machine-readable medium including machine-executable instructions thereon that, when executed by a processor, perform a method comprising:

receiving a request to delete data from a storage system;

determining a wear count value associated with a memory block among a plurality of memory blocks of the storage system;

determining whether the wear count value associated with the memory block satisfies a threshold wear count value; and

in response to determining that the wear count value associated with the memory block satisfies the threshold wear count value:

causing deletion of data from the memory block;

in response to determining that the wear count value associated with the memory block does not satisfy the threshold wear count value:

determining whether a counter satisfies a threshold number of attempts to identify a memory block associated with a wear count that satisfies the threshold wear count value; and

in response to determining that the counter satisfies the threshold number of attempts:

selecting randomly a second memory block from the plurality of memory blocks of the storage system; and

causing deletion of data from the second memory block.

Assignments (11)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2019
From: MITRA, ANAND; RASTOGI, KANISHK; UNNIKRISHNAN, SANOJ KIZHAKKEKARA
To: HGST NETHERLANDS B.V.
Reel/Frame 051282/0236 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2019
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 051287/0139 →