IP Library Granted Patent US 11,150,711
Granted Patent B2
US 11,150,711 · App. 16/016,427 · Granted Oct 19, 2021

Power adapter with protection circuitry

Inventor: Shyam Chavali (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F1/266G06F13/4282H02H1/0007H02H3/207G06F2213/0042H02J7/00
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Quick Facts
Patent No.
US 11,150,711
App. No.
16/016,427
Granted
Oct 19, 2021
Kind
B2
Abstract

Devices and methods for selectively providing a voltage to an external device. A power adapter comprises a switch between an input voltage line and an output voltage line, a voltage generator configured to produce an output test voltage for delivery to the external device via a test voltage path, a return voltage path for receiving a return voltage from the external device, and a comparator coupled to the return voltage path and configured to control the switch. The switch completes a path between the input voltage line and the output voltage line only if the return voltage matches the reference voltage. The external device comprises an interface for connection to the power adapter and a voltage generator configured to receive the output test voltage from the power adapter and, using the output test voltage, produce and provide the return voltage to the power adapter over the interface.

Claims (67)

1. A power adapter for selectively providing a source voltage to an external device, the power adapter comprising:

a switch coupled to an input voltage line and disposed between the input voltage line and an output voltage line, wherein the input voltage line is at an input voltage;

a voltage generator coupled to the input voltage line and configured to produce an output test voltage for delivery to the external device via a test voltage path;

a return voltage path for receiving a return voltage from the external device; and

a comparator coupled to a reference voltage line and the return voltage path and configured to (a) directly compare the return voltage to a reference voltage provided over the reference voltage line, and (b) control the switch such that:

when the return voltage matches the reference voltage, the switch completes a path between the input voltage line and the output voltage line, and

when the return voltage does not match the reference voltage, the switch does not complete the path between the input voltage line and the output voltage line.

2. The power adapter recited in claim 1 , wherein the switch comprises a field-effect transistor (FET), and an output of the comparator is coupled to a gate of the FET.

3. The power adapter recited in claim 1 , wherein the switch comprises a digital switch, and an output of the comparator is coupled to the digital switch.

4. The power adapter recited in claim 1 , wherein the switch is configured to remain in an open state unless the return voltage matches the reference voltage.

5. The power adapter recited in claim 1 , wherein the comparator comprises a microcontroller and an analog-to-digital converter.

6. The power adapter recited in claim 1 , wherein the comparator comprises an operational amplifier having a first input, a second input, and an output, and wherein the first input is coupled to the reference voltage line, the second input is coupled to the return voltage path, and the output is coupled to the switch.

7. The power adapter recited in claim 6 , wherein the switch comprises a field-effect transistor (FET), and the output is coupled to a gate of the FET.

8. The power adapter recited in claim 1 , wherein the comparator is configured to directly compare the return voltage to the reference voltage provided over the reference voltage line by detecting whether the return voltage is within a range characterized by a non-zero lower voltage limit and a non-zero upper voltage limit, the reference voltage being between the non-zero lower voltage limit and the non-zero upper voltage limit, and wherein the return voltage matches the reference voltage if the return voltage is within the range.

9. The power adapter recited in claim 8 , wherein the comparator comprises:

a first operational amplifier having a first input, a second input, and a first output;

a second operational amplifier having a third input, a fourth input, and a second output; and

a NAND gate having a fifth input, a sixth input, and a third output,

and wherein:

a voltage at the first input is at the non-zero upper voltage limit,

a voltage at the third input is at the non-zero lower voltage limit,

the second and fourth inputs are coupled to the return voltage path,

the first and second outputs are coupled to the fifth and sixth inputs, and

the third output is coupled to the switch.

10. The power adapter recited in claim 9 , wherein the switch comprises a field-effect transistor (FET), and the third output is coupled to a gate of the FET.

11. The power adapter recited in claim 1 , wherein the voltage generator comprises a resistor network, a voltage divider, or a voltage regulator.

12. The power adapter recited in claim 1 , wherein the input voltage is equal to the source voltage.

13. The power adapter recited in claim 1 , wherein the test voltage path comprises a first sideband use (SBU) pin of a Type-C universal serial bus (USB) connector, and the return voltage path comprises a second SBU pin of the Type-C USB connector.

14. A system, comprising:

the power adapter recited in claim 1 , wherein the voltage generator is a first voltage generator; and

the external device, wherein the external device comprises a second voltage generator configured to:

receive the output test voltage, and

using the output test voltage, produce the return voltage.

15. The system recited in claim 14 , wherein the second voltage generator comprises a resistor network, a voltage divider, or a voltage regulator.

16. The system recited in claim 14 , wherein the external device further comprises circuitry configured to implement a power negotiation protocol.

17. The system recited in claim 16 , wherein the power negotiation protocol is a universal serial bus (USB) power delivery protocol.

18. An external device to be coupled to a power adapter for selectively providing a source voltage to the external device, the external device comprising:

an interface for connection to the power adapter; and

a voltage generator coupled to the interface, wherein the voltage generator is configured to:

receive an output test voltage from the power adapter over the interface,

using the output test voltage, produce a return voltage, and

provide the return voltage to the power adapter over the interface,

wherein the power adapter comprises:

a power-adapter voltage generator configured to produce the output test voltage for delivery to the external device;

a return voltage path for receiving the return voltage from the external device; and

a comparator coupled to a reference voltage line and the return voltage path and configured to (a) directly compare the return voltage to a reference voltage, and (b) close a switch in response to the return voltage matching the reference voltage, thereby providing the source voltage to the external device.

19. The external device recited in claim 18 , wherein the voltage generator comprises a resistor network, a voltage divider, or a voltage regulator.

20. The external device recited in claim 18 , wherein the external device further comprises circuitry configured to implement a power negotiation protocol.

21. The external device recited in claim 20 , wherein the power negotiation protocol is a universal serial bus (USB) power delivery protocol.

22. A method of using a power adapter to selectively provide a source voltage to an external device, the method comprising:

in the power adapter, generating an output test voltage from an input voltage, the output test voltage for delivery to the external device;

the power adapter providing the output test voltage to the external device;

after providing the output test voltage to the external device, the power adapter receiving a return voltage from the external device;

the power adapter directly comparing the return voltage to a reference voltage;

in response to the return voltage matching the reference voltage, the power adapter providing the source voltage to the external device; and

in response to the return voltage not matching the reference voltage, the power adapter not providing the source voltage to the external device.

23. The method recited in claim 22 , wherein providing the source voltage to the external device comprises closing a switch between an input voltage line and an output voltage line in the power adapter.

24. The method recited in claim 22 , wherein generating the output test voltage from the input voltage comprises dividing the input voltage.

25. The method recited in claim 22 , wherein receiving the return voltage from the external device comprises receiving the return voltage over a sideband use (SBU) pin of a Type-C universal serial bus (USB) connector.

26. The method recited in claim 22 , wherein the power adapter providing the source voltage to the external device in response to the return voltage matching the reference voltage comprises:

determining whether the return voltage is within a specified range characterized by a non-zero lower voltage limit and a non-zero upper voltage limit, wherein the reference voltage is within the specified range, and

providing the source voltage to the external device if the return voltage is within the specified range.

27. The method recited in claim 22 , further comprising:

in the external device, generating the return voltage using the output test voltage; and

the external device providing the return voltage to the power adapter.

28. The method recited in claim 27 , wherein generating the return voltage from the output test voltage comprises dividing the output test voltage.

29. The method recited in claim 27 , wherein providing the output test voltage to the external device comprises providing the output test voltage over a first sideband use (SBU) pin of a Type-C universal serial bus (USB) connector, and providing the return voltage to the power adapter comprises providing the return voltage over a second SBU pin of the Type-C USB connector.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2018
From: CHAVALI, SHYAM
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 046235/0598 →