IP Library Granted Patent US 11,285,700
Granted Patent B2
US 11,285,700 · App. 16/082,393 · Granted Mar 29, 2022

Multilayer laminate and method for producing multilayer printed wiring board using same

Inventor: Yoshihiro Yoneda (Saitama, JP)
Assignee: MITSUI MINING & SMELTING CO., LTD.
B32B15/08B32B7/02B32B15/20B32B27/20H01G4/206H05K1/0213H05K1/09H05K1/162H05K3/0047H05K3/06H05K3/4038H05K3/4608H05K3/4644B32B3/266B32B27/18B32B27/38B32B2250/05B32B2250/40B32B2305/30B32B2307/202B32B2307/204B32B2307/212B32B2307/50B32B2307/54B32B2457/08B32B2457/16H01G2/06H01G4/12H01G4/1227H01G4/18H05K1/0231H05K1/185H05K3/429H05K3/445H05K3/4626H05K3/4641H05K3/4652H05K3/4655H05K2201/0137H05K2201/0191H05K2201/0195H05K2201/0203H05K2201/0355H05K2201/09309H05K2201/09509Y10S428/901Y10T29/49155Y10T29/49165Y10T428/12361Y10T428/12431Y10T428/12438Y10T428/12535Y10T428/12542Y10T428/12556Y10T428/12903Y10T428/24322Y10T428/25Y10T428/26Y10T428/266Y10T428/269Y10T428/31678
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,285,700
App. No.
16/082,393
Granted
Mar 29, 2022
Kind
B2
Abstract

A multi-layered board includes: a middle conductive layer; a first dielectric layer that is disposed directly on a first surface of the middle conductive layer; a second dielectric layer that is disposed directly on a second surface of the middle conductive layer; a first outer surface conductive layer that is disposed directly on an outer side of the first dielectric layer; and a second outer surface conductive layer that is disposed directly on an outer side of the second dielectric layer. The first outer surface conductive layer serves as a first outer surface of the multi-layered board, and the second outer surface conductive layer serves as a second outer surface of the multi-layered board. The middle conductive layer is solidly formed over an entire planar direction of the multi-layered board. The first dielectric layer and the second dielectric layer each independently have a thickness variation of 15% or less.

Claims (28)

1. A multi-layered board consisting of the following layers:

a middle conductive layer;

a first dielectric layer that is disposed directly on a first surface of the middle conductive layer;

a second dielectric layer that is disposed directly on a second surface of the middle conductive layer;

a first outer surface conductive layer that is disposed directly on an outer side of the first dielectric layer; and

a second outer surface conductive layer that is disposed directly on an outer side of the second dielectric layer;

wherein, in the multi-layered board, the first outer surface conductive layer serves as a first outer surface of the multi-layered board, and the second outer surface conductive layer serves as a second outer surface of the multi-layered board, the middle conductive layer is solidly formed over an entire planar direction of the multi-layered board, and the first dielectric layer and the second dielectric layer each independently have a thickness variation of 15% or less;

wherein each of the first dielectric layer and the second dielectric layer comprises dielectric particles and a resin, the dielectric particles having a relative dielectric constant of at least 50 and at most 20000;

wherein the first dielectric layer and the second dielectric layer are free of reinforcing material;

wherein each of the first dielectric layer and the second dielectric layer has a strain energy at break of at most 1.8 MJ;

wherein each of the first dielectric layer and the second dielectric layer has a tensile strength of at most 60.0 MPa; and

wherein each of the first dielectric layer and the second dielectric layer has a tensile elongation at break of at least 0.05% or more, and at most 5.0%.

2. The multi-layered board according to claim 1 , wherein a difference between a relative dielectric constant of the first dielectric layer and a relative dielectric constant of the second dielectric layer is 10% or less.

3. The multi-layered board according to claim 1 , wherein the first dielectric layer and the second dielectric layer each independently have a thickness of 0.1 μm or more and 30 μm or less.

4. The multi-layered board according to claim 3 , wherein the first dielectric layer and the second dielectric layer have the same thickness.

5. The multi-layered board according to claim 2 , wherein the first dielectric layer and the second dielectric layer each independently have a thickness of 0.1 μm or more and 30 μm or less.

6. The multi-layered board according to claim 1 , wherein a proportion of the dielectric particles in each of the first dielectric layer and the second dielectric layer is 60 mass % or more and 95 mass % or less.

7. The multi-layered board according to claim 6 , wherein the first dielectric layer and the second dielectric layer have the same composition.

8. The multi-layered board according to claim 2 , wherein a proportion of the dielectric particles in each of the first dielectric layer and the second dielectric layer is 60 mass % or more and 95 mass % or less.

9. The multi-layered board according to claim 3 , wherein a proportion of the dielectric particles in each of the first dielectric layer and the second dielectric layer is 60 mass % or more and 95 mass % or less.

10. The multi-layered board according to claim 4 , wherein a proportion of the dielectric particles in each of the first dielectric layer and the second dielectric layer is 60 mass % or more and 95 mass % or less.

11. The multi-layered board according to claim 1 , wherein each of the conductive layers is made of a copper foil, and independently has a thickness of 0.1 μm or more and 70 μm or less.

12. The multi-layered board according to claim 2 , wherein each of the conductive layers is made of a copper foil, and independently has a thickness of 0.1 μm or more and 70 μm or less.

13. The multi-layered board according to claim 3 , wherein each of the conductive layers is made of a copper foil, and independently has a thickness of 0.1 μm or more and 70 μm or less.

14. A method for producing a multi-layer printed wiring board, the method comprising the steps of:

preparing the multi-layered board according to claim 1 ;

forming a first through hole that extends through the multi-layered board in a thickness direction of the multi-layered board; completely filling the first through hole with a non-electroconductive filler; and

forming a second through hole having a diameter smaller than a diameter of the first through hole at a position where the filler is filled, such that the second through hole extends through the multi-layered board in the thickness direction.

Assignments (2)
CHANGE OF NAME Recorded Mar 31, 2026
From: MITSUI MINING AND SMELTING COMPANY, LIMITED
To: MITSUI KINZOKU COMPANY, LIMITED
Reel/Frame 075357/0342 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 5, 2018
From: YONEDA, YOSHIHIRO
To: MITSUI MINING & SMELTING CO., LTD.
Reel/Frame 046790/0903 →
Priority Claims (1)
JP PCT/JP2016/057563 · Mar 10, 2016 · national
Continuity (1)
Related Publication 20190110364A1 · Apr 11, 2019
Cited By (1)
US 12,250,771