Method for making a semiconductor device including non-monocrystalline stringer adjacent a superlattice-sti interface
A method for making a semiconductor device may include forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate, and forming a superlattice on the semiconductor substrate and extending between the first and second STI regions. The superlattice may include stacked groups of layers, each group of layers including stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The method may also include forming a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region, and forming a gate above the superlattice.
1. A method for making a semiconductor device comprising:
forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate using an STI photoresist mask;
forming a superlattice on the semiconductor substrate and extending between the first and second STI regions, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
forming the superlattice defining a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region;
removing the first semiconductor stringer by re-using the STI photoresist mask; and
forming a gate above the superlattice.
2. The method of claim 1 wherein the first semiconductor stringer is above the superlattice.
3. The method of claim 1 further comprising doping the semiconductor substrate and superlattice to define spaced apart source and drain regions therein.
4. The method of claim 1 wherein the first semiconductor stringer separates the first end of the superlattice and the first STI region.
5. The method of claim 1 wherein the semiconductor stringer comprises amorphous silicon.
6. The method of claim 1 further comprising implanting a channel stop dopant in the first semiconductor stringer.
7. The method of claim 1 further comprising forming an oxide cap on the first semiconductor stringer.
8. The method of claim 1 wherein the base semiconductor monolayers comprise silicon.
9. The method of claim 1 wherein the at least one non-semiconductor monolayer comprises oxygen.
10. A method for making a semiconductor device comprising:
forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate using an STI photoresist mask;
forming a superlattice on the semiconductor substrate and extending between the first and second STI regions, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions;
forming the superlattice defining a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region;
forming the superlattice defining a second semiconductor stringer adjacent an interface between a second end of the superlattice and the second STI region;
removing the first and second semiconductor stringers by re-using the STI photoresist mask;
forming a gate above the superlattice; and
doping the semiconductor substrate and superlattice to define spaced apart source and drain regions therein.
11. The method of claim 10 wherein the first semiconductor stringer is above the superlattice.
12. The method of claim 10 wherein the second semiconductor stringer separates the second end of the superlattice and the second STI region.
13. The method of claim 10 further comprising implanting a channel stop dopant in the first and second semiconductor stringers.
14. The method of claim 10 further comprising forming an oxide cap on the first semiconductor stringer.
15. The method of claim 10 wherein the base semiconductor monolayers comprise silicon.
16. The method of claim 10 wherein the at least one non-semiconductor monolayer comprises oxygen.
17. A method for making a semiconductor device comprising:
forming first and second spaced apart shallow trench isolation (STI) regions in a semiconductor substrate using an STI photoresist mask;
forming a superlattice on the semiconductor substrate and extending between the first and second STI regions, the superlattice comprising a plurality of stacked groups of layers, each group of layers comprising a plurality of stacked base silicon monolayers defining a base silicon portion, and at least one oxygen monolayer constrained within a crystal lattice of adjacent base silicon portions;
forming the superlattice defining a first semiconductor stringer comprising a non-monocrystalline body at an interface between a first end of the superlattice and the first STI region, the first semiconductor stringer being above the superlattice;
removing the first semiconductor stringer by re-using the STI photoresist mask; and
forming a gate above the superlattice.
18. The method of claim 17 further comprising doping the semiconductor substrate and superlattice to define spaced apart source and drain regions therein.
19. The method of claim 17 wherein the second semiconductor stringer separates the second end of the superlattice and the second STI region.
20. The method of claim 17 further comprising implanting a channel stop dopant in the first semiconductor stringer.
21. The method of claim 17 further comprising forming an oxide cap on the first semiconductor stringer.
22. The method of claim 1 wherein forming the superlattice further defines a second semiconductor stringer adjacent an interface between a second end of the superlattice and the second STI region.
23. The method of claim 17 wherein forming the superlattice further defines a second semiconductor stringer adjacent an interface between a second end of the superlattice and the second STI region.