IP Library Granted Patent US 10,739,839
Granted Patent B2
US 10,739,839 · App. 16/140,448 · Granted Aug 11, 2020

Efficient power management stand-by modes for multiple dies in a storage device

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 10,739,839
App. No.
16/140,448
Granted
Aug 11, 2020
Kind
B2
Abstract

Disclosed are systems and methods for efficient power management for storage devices. A method includes receiving a request to transition a flash memory to a first stand-by mode, wherein the flash memory comprises a plurality of dies. The method also includes causing one or more guard dies of the plurality of dies to transition to the first stand-by mode while causing one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode. The method also includes receiving an input/output (I/O) request for the flash memory. The method also includes causing the I/O request to be performed on the one or more guard dies that are in the first stand-by mode but not in the second stand-by mode.

Claims (42)

1. A method, comprising:

receiving a request to transition a flash memory to a first stand-by mode, wherein the flash memory comprises a plurality of dies;

causing one or more guard dies of the plurality of dies to transition to the first stand-by mode while causing one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode, and the one or more other dies are different than the one or more guard dies;

receiving an input/output (I/O) request for the flash memory while the one or more other dies of the plurality of dies are in the second stand-by mode; and

causing the I/O request to be performed on the one or more guard dies that are in the first stand-by mode but not on the one or more other dies that are in the second stand-by mode.

2. The method of claim 1 , further comprising selecting the one or more guard dies from the plurality of dies, based on a leakage current profile of the plurality of dies.

3. The method of claim 1 , further comprising selecting the one or more guard dies from the plurality of dies, based on whether the one or more guard dies have been previously selected.

4. The method of claim 1 , wherein a number of the one or more guard dies selected from the plurality of dies is based on a previous operation of a host computer coupled to the flash memory.

5. The method of claim 1 , wherein causing the I/O request to be performed on the one or more guard dies is in response to determining that the one or more guard dies have capacity to perform the I/O request.

6. The method of claim 5 , wherein the I/O request is a read request, and wherein determining that the one or more guard dies have capacity comprises determining that data for the read request is stored in the one or more guard dies.

7. The method of claim 5 , wherein the I/O request is a write request, and wherein determining that the one or more guard dies have capacity comprises determining that a size of data for the write request does not satisfy a wake up threshold.

8. The method of claim 1 , wherein the request to transition the flash memory to a first stand-by mode is in response to detecting a first idle threshold has been satisfied for the flash memory.

9. The method of claim 1 , wherein the second stand-by mode causes the flash memory to use one or more circuit components to switch off a supply voltage to each of the one or more other dies that are in the second stand-by mode.

10. The method of claim 1 , further comprising:

selecting the one or more guard dies from the plurality of dies based on an access history of I/O request hits and misses recorded for the plurality of dies.

11. A data storage device, comprising:

a flash memory comprising a plurality of dies; and

a controller configured to:

receive a request to transition the flash memory to a first stand-by mode;

cause one or more guard dies of the plurality of dies to transition to the first stand-by mode;

cause one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode;

receive an input/output (I/O) request for the flash memory; and

cause the I/O request to be performed on the one or more guard dies that are in the first stand-by mode but not on the one or more other dies that are in the second stand-by mode.

12. The data storage device of claim 11 , wherein the controller is further configured to select the one or more guard dies from the plurality of dies based on one or more of: a leakage profile of the plurality of dies, a prior history of selecting guard dies from the plurality of dies, and a previous operation of a host computer associated with the flash memory.

13. The data storage device of claim 11 , wherein the controller is further configured to cause the I/O request to be performed on the one or more guard dies in response to determining that the one or more guard dies have capacity to perform the I/O request.

14. The data storage device of claim 13 , wherein when the I/O request is a read request, the controller is further configured to determine that the one or more guard dies have capacity based on whether the one or more guard dies contain data for the read request.

15. The data storage device of claim 13 , wherein when the I/O request is a write request, the controller is further configured to determine that the one or more guard dies have capacity based on whether a size of data for the write request exceeds a wake up threshold.

16. The data storage device of claim 11 , further comprising one or more gates coupled to the plurality of dies and configured to be coupled to a supply voltage, and wherein the controller is further configured to cause the one or more other dies of the plurality of dies to transition to the second stand-by mode by using the one or more gates to switch off the supply voltage to the one or more other dies that are in the second stand-by mode.

17. The data storage device of claim 11 , wherein the controller is further configured to select the one or more guard dies from the plurality of dies based on an access history of I/O request hits and misses associated with the plurality of dies.

18. A non-transitory machine-readable medium including machine-executable instructions thereon that, when executed by a processor, perform a method comprising:

receiving a request to transition a flash memory to a first stand-by mode, wherein the flash memory comprises a plurality of dies;

causing one or more guard dies of the plurality of dies to transition to the first stand-by mode;

causing one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode;

receiving an operation request for the flash memory while the one or more other dies of the plurality of dies are in the second stand-by mode; and

causing the operation request to be performed on the one or more guard dies that are in the first stand-by mode but not on the one or more other dies that are in the second stand-by mode.

19. The non-transitory machine-readable medium of claim 18 , wherein the method further comprises selecting the one or more guard dies from the plurality of dies based on at least one of: a leakage current profile of the plurality of dies, whether the one or more guard dies have been previously selected, or a previous operation of a host computer associated with the flash memory.

20. A system, comprising:

means for receiving a request to transition a flash memory to a first stand-by mode, wherein the flash memory comprises a plurality of dies;

means for causing one or more guard dies of the plurality of dies to transition to the first stand-by mode while causing one or more other dies of the plurality of dies to transition to a second stand-by mode, wherein the second stand-by mode is configured to consume less power than the first stand-by mode, and the one or more other dies are different than the one or more guard dies;

means for receiving an input/output (I/O) request for the flash memory while the one or more other dies of the plurality of dies are in the second stand-by mode; and

means for causing the I/O request to be performed on the one or more guard dies that are in the first stand-by mode but not on the one or more other dies that are in the second stand-by mode.

21. The system claim 20 , further comprising means for selecting the one or more guard dies from the plurality of dies based on one or more of: a leakage profile of the plurality of dies, a prior history of selecting guard dies from the plurality of dies, and one or more prior operations of a host computer associated with the flash memory.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2018
From: BAZARSKY, ALEXANDER; ELIASH, TOMER TZVI; GROSSMAN, YUVAL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 047060/0555 →