Method of fabricating a semiconductor device with strained SiGe fins and a Si cladding layer
Techniques and methods related to strained NMOS and PMOS devices without relaxed substrates, systems incorporating such semiconductor devices, and methods therefor may include a semiconductor device that may have both n-type and p-type semiconductor bodies. Both types of semiconductor bodies may be formed from an initially strained semiconductor material such as silicon germanium. A silicon cladding layer may then be provided at least over or on the n-type semiconductor body. In one example, a lower portion of the semiconductor bodies is formed by a Si extension of the wafer or substrate. By one approach, an upper portion of the semiconductor bodies, formed of the strained SiGe, may be formed by blanket depositing the strained SiGe layer on the Si wafer, and then etching through the SiGe layer and into the Si wafer to form the semiconductor bodies or fins with the lower and upper portions.
1. A method of fabricating a semiconductor device, comprising:
forming at least one p-type semiconductor body and at least one n-type semiconductor body over a substrate, wherein the at least one p-type semiconductor body and at least one n-type semiconductor body have a source region, a channel region, and a drain region;
forming a lower portion of the at least one p-type semiconductor body and at least one n-type semiconductor body comprising forming trenches in the substrate, and forming an upper portion of the at least one p-type semiconductor body and at least one n-type semiconductor body on the lower portions and comprising strained SiGe with (110) crystal orientation facing a channel flow direction, and a (110) upper facing surface, and at least at the channel region;
forming a cladding layer comprising silicon on at least one n-type semiconductor body; and
wherein forming at least one p-type semiconductor body and at least one n-type semiconductor body comprises:
forming a strained Si Ge layer over the substrate, and forming trenches through the Si Ge layer and into the substrate to form the at least one p-type semiconductor body and at least one n-type semiconductor body with a lower portion made of silicon and an upper portion made of SiGe.
2. The method of claim 1 , wherein the upper portion is formed with (100) sidewall surfaces,
annealing, and
oxidation by rapid thermal oxidation (RTO).
3. The method of claim 1 , comprising at least one of:
maintaining a removable cover on the p-type semiconductor bodies while depositing the cladding layer on the n-type semiconductor bodies, and removing cladding material from on the p-type semiconductor bodies resulting from depositing the cladding layer on then-type semiconductor bodies.
4. The method of claim 1 , comprising forming a source and/or drain region on at least one p-type semiconductor body or at least one n-type semiconductor body, and with at least one of:
the same material as a cladding layer on the at least one p-type semiconductor body or at least one n-type semiconductor body, and a filler material disposed at a space formed by removing material from one or more source and/or drain regions of the at least one p-type semiconductor body or at least one n-type semiconductor body, and
wherein the at least one p-type semiconductor body or at least one n-type semiconductor body having a relaxation causing free surface formed by the removal.
5. A method of fabricating a semiconductor device, comprising:
forming at least one p-type semiconductor body and at least one n-type semiconductor body over a substrate, wherein the at least one p-type semiconductor body and at least one n-type semiconductor body have a source region, a channel region, and a drain region;
forming a lower portion of the at least one p-type semiconductor body and at least one n-type semiconductor body comprising forming trenches in the substrate, and forming an upper portion of the at least one p-type semiconductor body and at least one n-type semiconductor body on the lower portions and comprising strained SiGe with (110) crystal orientation facing a channel flow direction, and a (110) upper facing surface, and at least at the channel region;
forming a cladding layer comprising silicon on at least one n-type semiconductor body; and
maintaining a removable cover on at least one p-type semiconductor body while depositing the cladding layer on the at least one n-type semiconductor body, and removing cladding material from on the at least one p-type semiconductor body resulting from depositing the cladding layer on the at least one n-type semiconductor body.