IP Library Granted Patent US 11,569,144
Granted Patent B2
US 11,569,144 · App. 16/158,049 · Granted Jan 31, 2023

Semiconductor package design for solder joint reliability

Inventors: Yuhong Cai (Folsom, CA); Yi Xu (Folsom, CA)
Assignee: Intel Corporation
H01L23/3135H01L21/0273H01L21/561H01L21/565H01L21/78H01L23/3128H01L24/48H01L25/0657H01L25/50H01L2224/48091H01L2224/48106H01L2224/48145H01L2224/48225H01L2225/0651H01L2225/06506H01L2225/06562H01L2225/06586
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Quick Facts
Patent No.
US 11,569,144
App. No.
16/158,049
Granted
Jan 31, 2023
Kind
B2
Abstract

Embodiments described herein provide techniques for using a stress absorption material to improve solder joint reliability in semiconductor packages and packaged systems. One technique produces a semiconductor package that includes a die on a substrate, where the die has a first surface, a second surface opposite the first surface, and a sidewall surface coupling the first surface to the second surface. The semiconductor package further includes a stress absorption material contacting the sidewall surface of the die and a molding compound separated from the sidewall surface of the die by the stress absorption material. The Young's modulus of the stress absorption material is lower than the Young's modulus of the molding compound. One example of a stress absorption material is a photoresist.

Claims (29)

1. A semiconductor package, comprising:

a die on a substrate, the die having a first surface, a second surface opposite the first surface, and a sidewall surface coupling the first surface to the second surface;

a stress absorption material contacting the sidewall surface of the die;

a molding compound separated from the sidewall surface of the die by the stress absorption material; and

a wire bond electrically coupling the die to the substrate, wherein a first portion of the wire bond is in the stress absorption material, and a second portion of the wire bond is in the molding compound.

2. The semiconductor package of claim 1 , wherein a Young's modulus of the stress absorption material is lower than a Young's modulus of the molding compound.

3. The semiconductor package of claim 2 , wherein the Young's modulus of the stress absorption material is less than or equal to 3 Gigapascals.

4. The semiconductor package of claim 1 , wherein the stress absorption material comprises a photoresist material.

5. The semiconductor package of claim 1 , wherein the stress absorption material contacts the second surface of the die.

6. A packaged system, comprising:

a semiconductor package on a printed circuit board, the semiconductor package comprising:

a die stack on a substrate, wherein the die stack comprises a plurality of dies and wherein two or more of the plurality of dies are offset from each other;

a stress absorption material encapsulating the die stack;

a molding compound encapsulating the stress absorption material; and

wire bonds coupling the plurality of dies to the substrate, wherein a first portion of one of the wire bonds is in the stress absorption material, and a second portion of the one of the wire bonds is in the molding compound.

7. The packaged system of claim 6 , wherein a Young's modulus of the stress absorption material is lower than a Young's modulus of the molding compound.

8. The packaged system of claim 7 , wherein the Young's modulus of the stress absorption material is less than or equal to 3 Gigapascals.

9. The packaged system of claim 6 , wherein the stress absorption material comprises a photoresist material.

10. The packaged system of claim 6 , wherein, for each of the plurality of dies, the stress absorption material encapsulates lateral sides of the die.

11. The packaged system of claim 6 , wherein the stress absorption material encapsulates top surfaces of the plurality of dies in the die stack.

12. A semiconductor package, comprising:

a die on a substrate, the die having a first surface, a second surface opposite the first surface, and a sidewall surface coupling the first surface to the second surface;

a stress absorption material contacting the sidewall surface of the die, wherein the stress absorption material comprises a photoresist material; and

a molding compound separated from the sidewall surface of the die by the stress absorption material.

13. A packaged system, comprising:

a semiconductor package on a printed circuit board, the semiconductor package comprising:

a die stack on a substrate, wherein the die stack comprises a plurality of dies and wherein two or more of the plurality of dies are offset from each other;

a stress absorption material encapsulating the die stack, wherein the stress absorption material comprises a photoresist material; and

a molding compound encapsulating the stress absorption material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2025
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP. (DBA SOLIDIGM)
Reel/Frame 072850/0834 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 6, 2019
From: CAI, YUHONG; XU, YI
To: INTEL CORPORATION
Reel/Frame 048257/0307 →
Continuity (1)
Related Publication 20200118901A1 · Apr 16, 2020