Methods and apparatus for workload based dynamic cache control in SSD
View Patent ↗Aspects of the present disclosure provide various apparatus, devices, systems and methods for dynamically configuring a cache partition in a solid state drive (SSD). The SSD may include non-volatile memory (NVM) that can be configured to store a different number of bits per cell. The NVM is partitioned into a cache partition and a storage partition, and the respective sizes of the partitions is dynamically changed based on a locality of data (LOD) of the access pattern of the NVM.
1. A solid state device (SSD) comprising:
a non-volatile memory (NVM), and
a controller operatively coupled to the NVM;
wherein the controller is configured to:
determine an access pattern of the NVM by a host;
determine a hit and miss (H/M) rate of a logical block address (LBA) range accessed by the host during a predetermined time period;
determine a locality of data (LOD) of the access pattern as the LBA when the H/M rate meets a target rate;
dynamically configure data storage cells of the NVM into a cache partition and a storage partition based on the LOD of the access pattern; and
adjust a size of the cache partition in response to a change of the LOD, wherein the data storage cells of the cache partition are configured to provide greater endurance than the data storage cells of the storage partition.
2. The SSD of claim 1 ,
wherein the data storage cells of the storage partition comprise quad-level cell (QLC) type cells, and
wherein the data storage cells of the cache partition comprise at least one of single-level cell (SLC) type cells or multi-level cell (MLC) type cells.
3. The SSD of claim 1 , wherein the controller is further configured to:
to adjust the size of the cache partition in response to a change in size of the LOD.
4. The SSD of claim 3 , wherein the controller is further configured to:
adjust the size of the cache partition to be no less than the size of the LOD.
5. The SSD of claim 1 , wherein the data storage cells of the storage partition are configured to store a greater number of bits per cell than the data storage cells of the cache partition.
6. A method of operating a non-volatile memory (NVM) controller configured to communicate with an NVM, comprising:
receiving commands from a host for accessing the NVM;
determining an access pattern of the NVM by the host;
determining a hit and miss (H/M) rate of a logical block address (LBA) range accessed by the host during a predetermined time period;
determining a locality of data (LOD) of the access pattern as the LBA when the H/M rate meets a target rate; and
dynamically configuring data storage cells of the NVM into a cache partition and a storage partition based on the LOD of the access pattern, wherein the data storage cells of the cache partition are configured to provide higher performance than the data storage cells of the storage partition.
7. The method of claim 6 , wherein the data storage cells of the cache partition are configured to provide greater endurance than the data storage cells of the storage partition.
8. The method of claim 6 , wherein data storage cells of the storage partition are configured to store a greater number of bits per cell than the data storage cells of the cache partition.
9. The method of claim 6 , wherein dynamically configuring the data storage cells comprises:
adjusting a size of the cache partition in response to a change in size of the LOD.
10. The method of claim 9 , wherein adjusting the size of the cache partition comprises:
adjusting the size of the cache partition to be no less than the size of the LOD.
11. The method of claim 10 , wherein adjusting the size of the cache partition further comprises:
limiting the size of the cache partition such that a provisioned capacity of the NVM is available to the host regardless of the size of the cache partition.
12. A non-volatile memory (NVM) comprising:
means for receiving commands from a host for performing data operations with the NVM;
means for determining an access pattern of the NVM by the host;
means for determining a locality of data (LOD) corresponding to a logical block address (LBA) range accessed by the host during a predetermined time period;
means for dynamically configuring data storage cells of the NVM into a cache partition and a storage partition based the LOD of the access pattern, wherein data storage cells of the storage partition are configured to use more threshold voltages per cell for storing data than the data storage cells of the cache partition;
means for adjusting the cache partition to be no smaller than the LOD in size such that the cache partition accommodates a higher percentage of the data operations relative to the storage partition; and
means for limiting the size of the cache partition such that a provisioned capacity of the NVM is available to the host regardless of the size of the cache partition.
13. The NVM of claim 12 , wherein data storage cells of the storage partition are configured to store a greater number of bits per cell than the data storage cells of the cache partition.
14. The NVM of claim 12 , wherein the means for adjusting the cache partition is further configured to:
increase the size of the cache partition in response to a size increase of the LOD; and
decrease the size of the cache partition in response to a size decrease of the LOD.