IP Library Granted Patent US 10,797,201
Granted Patent B2
US 10,797,201 · App. 16/173,617 · Granted Oct 6, 2020

High voltage monolithic LED chip

Inventors: Kevin W. Haberern (Cary, NC); Matthew Donofrio (Raleigh, NC); Bennett Langsdorf (Cary, NC); Thomas Place (Franklinton, NC); Michael John Bergmann (Raleigh, NC)
Assignee: CREE, INC.
H01L33/08H01L25/0753H01L33/405H01L33/46H01L2224/32257H01L2224/48091H01L2224/48247H01L2224/73265
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Quick Facts
Patent No.
US 10,797,201
App. No.
16/173,617
Granted
Oct 6, 2020
Kind
B2
Abstract

Monolithic LED chips are disclosed comprising a plurality of active regions on submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another with at least some of the active regions having a space between adjacent ones of the active regions that is 10 percent or less of the width of one or more of the active regions. The space is substantially not visible when the LED chip is emitting, such that the LED chips emits light similar to a filament.

Claims (32)

1. A monolithic LED chip, comprising:

a plurality of active regions;

one or more insulating material layers;

electrically conductive interconnect elements embedded in the one or more insulating layers;

a reflective layer arranged between the one or more insulating material layers and the plurality of active regions; and

a plurality of electrically conductive vias extending from the electrically conductive interconnect elements and through the reflective layer to contact the plurality of active regions.

2. The monolithic LED chip of claim 1 , wherein the electrically conductive interconnect elements and the plurality of electrically conductive vias connect at least some active regions of the plurality of active regions in series, in parallel, or in series-parallel.

3. The monolithic LED chip of claim 1 , further comprising a current spreading layer arranged between the reflective layer and the plurality of active regions.

4. The monolithic LED chip of claim 1 , further comprising a submount, wherein the one or more insulating material layers are arranged between the submount and the plurality of active regions.

5. The monolithic LED chip of claim 4 , further comprising a blanket mirror and/or a bond metal layer arranged between the submount and the one or more insulating material layers.

6. The monolithic LED chip of claim 1 , wherein the electrically conductive interconnect elements comprise metal layer segments within said one or more insulating material layers.

7. The monolithic LED chip of claim 1 , wherein:

the plurality of electrically conductive vias includes a first group of one or more electrically conductive vias coupled with an n-type layer of the plurality of active regions, and a second group of one or more electrically conductive vias coupled with a p-type layer of the plurality of active regions; and

each electrically conductive via of the first group of one or more electrically conductive vias comprises a greater height than each electrically conductive via of the second group of one or more electrically conductive vias.

8. The monolithic LED chip of claim 1 , wherein at least some adjacent active regions of the plurality of active regions are separated from one another by a space that is 10 percent or less of a width of one or more active regions of the at least some adjacent active regions.

9. The monolithic LED chip of claim 1 , wherein the one or more insulating material layers comprises first and second insulating material layers each independently selected from the group consisting of oxides, nitrides, and oxynitrides.

10. The monolithic LED chip of claim 1 , comprising a top side and a bottom side, and being configured to emit LED emissions from the top side, wherein the monolithic LED chip further comprises a p-contact pad and an n-contact pad that are accessible along the top side.

11. The monolithic LED chip of claim 1 , comprising a top side and a bottom side, and being configured to emit LED emissions from the top side, wherein the monolithic LED chip further comprises a p-contact pad and an n-contact pad, with one of the p-contact pad or the n-contact pad being accessible along the top side, and the other of the p-contact pad or the n-contact pad being accessible along the bottom side.

12. A monolithic LED chip, comprising:

a plurality of active regions;

one or more insulating material layers;

at least one electrically conductive interconnect element that is embedded within, and extends laterally within, the one or more insulating material layers;

a first group of one or more electrically conductive vias electrically coupling the at least one electrically conductive interconnect element and the plurality of active regions; and

a second group of one or more electrically conductive vias electrically coupling the at least one electrically conductive interconnect element and the plurality of active regions;

wherein each electrically conductive via of the first group of one or more electrically conductive vias comprises a greater height than each electrically conductive via of the second group of one or more electrically conductive vias.

13. The monolithic LED chip of claim 12 , wherein each electrically conductive via of the first group of one or more electrically conductive vias is coupled with an n-type layer of an active region of the plurality of active regions, and each electrically conductive via of the second group of one or more electrically conductive vias is coupled with a p-type layer of an active region of the plurality of active regions.

14. The monolithic LED chip of claim 12 , further comprising a submount, wherein the one or more insulating material layers are arranged between the submount and the plurality of active regions.

15. The monolithic LED chip of claim 14 , further comprising a blanket mirror and/or a bond metal arranged between the submount and the one or more insulating material layers.

16. The monolithic LED chip of claim 12 , wherein at least some adjacent active regions of the plurality of active regions are separated from one another by a space that is 10 percent or less of a width of one or more active regions of the at least some adjacent active regions.

17. The monolithic LED chip of claim 12 , further comprising a reflective layer arranged between the one or more insulating material layers and the plurality of active regions, wherein at least some electrically conductive vias of the plurality of electrically conductive vias extend through the reflective layer.

18. The monolithic LED chip of claim 12 , comprising a top side and a bottom side, and being configured to emit LED emissions from the top side, wherein the monolithic LED chip further comprises a p-contact pad and an n-contact pad that are accessible along the top side.

19. The monolithic LED chip of claim 12 , comprising a top side and a bottom side, and being configured to emit LED emissions from the top side, wherein the monolithic LED chip further comprises a p-contact pad and an n-contact pad, with one of the p-contact pad or the n-contact pad being accessible along the top side, and the other of the p-contact pad or the n-contact pad being accessible along the bottom side.

Assignments (5)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 057017/0311 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 12, 2018
From: HABERERN, KEVIN; DONOFRIO, MATTHEW; LANGSDORF, BENNETT; PLACE, THOMAS; BERGMANN, MICHAEL JOHN
To: CREE, INC.
Reel/Frame 047475/0504 →
Continuity (4)
Continuation 15647823 · Jul 12, 2017
Continuation 14050001 · Oct 9, 2013
Continuation In Part 13168689 · Jun 24, 2011
Related Publication 20190074407A1 · Mar 7, 2019