Programmable battery protection system and related methods
A programmable battery protection system. Implementations may include a battery protection integrated circuit (IC) with an array of fuses, a plurality of latches coupled with the array of fuses, a plurality of MOSFETs coupled with the plurality of latches, and a plurality of resistors coupled in series and in parallel with each one of the plurality of MOSFETs. The IC may also include a comparator coupled with the plurality of resistors and with a battery control circuit. Whether any one of the array of fuses is open or closed (remains closed) may be set by a fuse trimming signal from the battery control circuit. A voltage supplied to the comparator by the plurality of resistors during operation may be one of a discharge overcurrent threshold voltage, a charge overcurrent threshold voltage, or a short current threshold voltage.
1. A method of providing a threshold voltage for a programmable battery protection system, the method comprising:
measuring on resistance of one of a charging field effect transistor (FET), a discharging FET, or both the charging FET and the discharging FET, the charging FET and discharging FET configured to couple with a battery and a battery protection integrated circuit (IC);
calculating using the battery protection IC, the threshold voltage using the on resistance;
using a fuse trimming signal generated based on the threshold voltage, opening or leaving closed each fuse of an array of fuses;
reading a state of each fuse of the array of fuses into a latch of a plurality of latches coupled with the array of fuses;
using a state of each latch of the plurality of latches to one of open or leave closed a metal oxide semiconductor field effect transistor (MOSFET) of a plurality of MOSFETs, each of the plurality of MOSFETs coupled with each latch of the plurality of latches, each MOSFET coupled in parallel with a resistor of a plurality of resistors coupled in series;
supplying a generated threshold voltage to a comparator comprised in a detector, the detector coupled with the battery protection IC; and
separating a connection between the battery and one of a load or a charger using a detection signal received by the battery protection IC from the detector using the generated threshold voltage.
2. The method of claim 1 , wherein the threshold voltage is one of a discharge overcurrent threshold voltage value, a charge overcurrent threshold voltage value, or a short current threshold voltage value and the detector is one of a discharge overcurrent detector, a charge overcurrent detector, or a short circuit detector.
3. The method of claim 2 , wherein calculating the threshold voltage using the battery protection IC and the on resistance includes calculating using one of a discharge overcurrent value, a charge overcurrent value, or a short current value.
4. The method of claim 1 , wherein the battery protection IC is physically comprised in a same semiconductor package as the charging FET and the discharging FET.
5. The method of claim 1 , wherein the charging FET and the discharging FET are comprised on the same semiconductor chip.
6. The method of claim 1 , wherein the plurality of MOSFETs are p-channel MOSFETs.
7. The method of claim 1 , wherein the plurality of latches are gated D-latches.
8. The method of claim 1 , wherein the array of fuses are polyfuses comprising polysilicon.
9. The method of claim 1 , wherein the array of fuses are a Programmable Read Only Memory (PROM).
10. The method of claim 1 , wherein the array of fuses are a One-Time Programmable (OTP) memory.
11. A method of providing a threshold voltage for a programmable battery protection system, the method comprising:
measuring on resistance of one of a charging field effect transistor (FET), a discharging FET, or both the charging FET and the discharging FET, the charging FET and discharging FET coupled with a battery and a battery protection integrated circuit (IC);
calculating using a battery protection circuit comprised in the battery protection IC, the threshold voltage using the on resistance;
generating using the battery protection circuit, a fuse trimming signal using the threshold voltage;
sending the fuse trimming signal to an array of fuses comprised in the battery protection IC and opening or leaving closed each fuse of the array of fuses using the fuse trimming signal;
reading a state of each fuse of the array of fuses into a latch of a plurality of latches coupled with the array of fuses;
using a state of each latch of the plurality of latches to one of open or leave closed a metal oxide semiconductor field effect transistor (MOSFET) of a plurality of MOSFETs, each of the plurality of MOSFETs coupled with each latch of the plurality of latches, each MOSFET coupled in parallel with a resistor of a plurality of resistors coupled in series;
changing a summed resistance of the plurality of resistors through one of opening or leaving closed each one of the plurality of MOSFETs;
using the summed resistance, supplying a generated threshold voltage to a comparator comprised in a detector, the detector coupled with a battery protection circuit comprised in the battery protection IC; and
separating a connection between the battery and one of a load and a charger using a detection signal received by the battery protection circuit from the detector using the generated threshold voltage.
12. The method of claim 11 , wherein the threshold voltage is one of a discharge overcurrent threshold voltage value, a charge overcurrent threshold voltage value, or a short current threshold voltage value and the detector is one of a discharge overcurrent detector, a charge overcurrent detector, or a short circuit detector.
13. The method of claim 12 , wherein calculating the threshold voltage using the battery protection circuit and the on resistance includes calculating using one of a discharge overcurrent value, a charge overcurrent value, or a short current value.
14. The method of claim 11 , wherein the battery protection circuit is physically comprised in a same semiconductor package as the charging FET and the discharging FET.
15. The method of claim 11 , wherein the charging FET and the discharging FET are comprised on the same semiconductor chip.
16. The method of claim 11 , wherein the plurality of MOSFETs are p-channel MOSFETs.
17. The method of claim 11 , wherein the plurality of latches are gated D-latches.
18. The method of claim 11 , wherein the array of fuses are polyfuses comprising polysilicon.
19. The method of claim 11 , wherein the array of fuses are a Programmable Read Only Memory (PROM).
20. The method of claim 11 , wherein the array of fuses are a One-Time Programmable (OTP) memory.