IP Library Granted Patent US 10,438,669
Granted Patent B2
US 10,438,669 · App. 16/216,904 · Granted Oct 8, 2019

Flash storage device with data integrity protection

Inventor: Mark Moshayedi (Newport Coast, CA)
Assignee: Western Digital Technologies, Inc.
G11C16/30G11C5/141G11C5/144G11C16/10
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Quick Facts
Patent No.
US 10,438,669
App. No.
16/216,904
Granted
Oct 8, 2019
Kind
B2
Abstract

A flash storage device includes a power hold circuit including a double layer capacitor. A power source supplies power to the flash storage device and charges the double layer capacitor. The double layer capacitor supplies power for maintaining integrity of data during a data transfer occurring in the flash storage device when the power supplied by the power source is disrupted. Additionally, the flash storage device can inhibit subsequent data transfers until the power supplied by the power source is restored.

Claims (68)

1. A method of maintaining data integrity in a flash storage device, the method comprising:

supplying a first voltage;

supplying a second voltage;

applying the second voltage to a capacitive element to charge the capacitive element to a third voltage;

providing the third voltage to a flash storage controller and a flash storage;

applying one of the first voltage or the second voltage to an electrical storage element to charge the electrical storage element to a first threshold voltage;

providing the first threshold voltage to a power monitoring circuit;

providing a comparator output from the power monitoring circuit to the flash storage controller, the comparator output being based on a combination of a first comparison of the first voltage with respect to the first threshold voltage and a second comparison of the second voltage with respect to the first threshold voltage;

determining that the first voltage and the second voltage are each greater than the first threshold voltage at which there is no disruption in power;

initiating a data transfer in the flash storage;

determining that the third voltage is greater than a second threshold voltage at which data integrity is maintained for the data transfer; and

completing the data transfer in the flash storage.

2. The method of claim 1 , wherein the electrical storage element is charged to the first threshold voltage when the comparator output indicates no disruption in the first voltage and the second voltage.

3. The method of claim 1 , wherein the first voltage is supplied from a first power source and the second voltage is supplied from a second power source.

4. The method of claim 1 , further comprising providing the second voltage to a hold circuit, the hold circuit comprising the capacitive element.

5. The method of claim 4 , further comprising: providing the third voltage from the hold circuit to a data buffer; receiving a programming command from a host; and writing a plurality of data portions into the data buffer in response to the programming command.

6. The method of claim 4 , further comprising inhibiting current flow from the flash storage controller to the hold circuit when the comparator output indicates disruption in power supplied by the first voltage or the second voltage.

7. The method of claim 1 , further comprising:

monitoring the first voltage;

determining that the first voltage is smaller than the first threshold voltage; and

inhibiting a subsequent data transfer from occurring in the flash storage based on the determination that the first voltage is smaller than the first threshold voltage.

8. The method of claim 1 , further comprising:

monitoring the second voltage;

determining that the second voltage is smaller than the first threshold voltage; and

inhibiting a subsequent data transfer from occurring in the flash storage based on the determination that the second voltage is smaller than the first threshold voltage.

9. A system for maintaining data integrity in a flash storage device, the system comprising:

a flash storage;

a data buffer;

a power hold circuit electrically coupled to the flash storage and the data buffer;

a power monitoring circuit electrically coupled to an output of the power hold circuit, the power monitoring circuit configured to receive a first voltage from a device power source and a second voltage from a host power source, the power monitoring circuit configured to generate a comparator output based on a combination of a first comparison of the first voltage with respect to a first threshold voltage and a second comparison of the second voltage with respect to the first threshold voltage;

an electrical storage element electrically coupled to an input to the power monitoring circuit, the electrical storage element configured to supply the first threshold voltage to the power monitoring circuit based on one of the first voltage or the second voltage; and

a flash storage controller electrically coupled to the flash storage, the data buffer, the power hold circuit and the power monitoring circuit, the flash storage controller configured to initiate a data transfer to the flash storage via the data buffer based on a determination that the first voltage and the second voltage are each greater than the first threshold voltage, and the flash storage controller configured to complete the data transfer based on a determination that a third voltage from the power hold circuit is greater than a second threshold voltage at which data integrity is maintained for the data transfer.

10. The system of claim 9 , wherein the flash storage controller is configured to:

write one or more portions of data into the data buffer;

read the one or more portions of data from the data buffer; and

write the one or more portions of data read from the data buffer into the flash storage.

11. The system of claim 9 , wherein the flash storage controller is configured to:

read one or more portions of data from the flash storage;

write the one or more portions of data read from the flash storage into the data buffer; and

read the one or more portions of data from the data buffer.

12. A data storage system, comprising:

means for supplying a first voltage;

means for supplying a second voltage;

means for applying the second voltage to a capacitive element to charge the capacitive element to a third voltage;

means for providing the third voltage to a flash storage controller and a flash storage;

means for applying one of the first voltage or the second voltage to an electrical storage element to charge the electrical storage element to a first threshold voltage;

means for providing the first threshold voltage to a power monitoring circuit;

means for providing a comparator output from the power monitoring circuit to the flash storage controller, the comparator output being based on a combination of a first comparison of the first voltage with respect to the first threshold voltage and a second comparison of the second voltage with respect to the first threshold voltage;

means for determining that the first voltage and the second voltage are each greater than the first threshold voltage at which there is no disruption in power;

means for initiating a data transfer in the flash storage;

means for determining that the third voltage is greater than a second threshold voltage at which data integrity is maintained for the data transfer; and

means for completing the data transfer in the flash storage.

13. The data storage system of claim 12 , comprising:

means for charging the electrical storage element to the first threshold voltage when the comparator output indicates no disruption in the first voltage and the second voltage.

14. The data storage system of claim 12 , wherein the first voltage is supplied from a first power source and the second voltage is supplied from a second power source.

15. The data storage system of claim 12 , comprising:

means for providing the second voltage to a hold circuit, the hold circuit comprising the capacitive element.

16. The data storage system of claim 15 , comprising: means for providing the third voltage from the hold circuit to a data buffer; means for receiving a programming command from a host; and means for writing a plurality of data portions into the data buffer in response to the programming command.

17. The data storage system of claim 15 , comprising:

means for inhibiting current flow from the flash storage controller to the hold circuit when the comparator output indicates disruption in power supplied by the first voltage or the second voltage.

18. The data storage system of claim 12 , comprising:

means for monitoring the first voltage;

means for determining that the first voltage is smaller than the first threshold voltage; and

means for inhibiting a subsequent data transfer from occurring in the flash storage based on the determination that the first voltage is smaller than the first threshold voltage.

19. The data storage system of claim 12 , comprising:

means for monitoring the second voltage;

means for determining that the second voltage is smaller than the first threshold voltage; and

means for inhibiting a subsequent data transfer from occurring in the flash storage based on the determination that the second voltage is smaller than the first threshold voltage.

Assignments (12)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2018
From: MOSHAYEDI, MARK
To: STEC, INC.
Reel/Frame 047772/0581 →
CHANGE OF NAME Recorded Dec 13, 2018
From: STEC, INC.
To: HGST TECHNOLOGIES SANTA ANA, INC.
Reel/Frame 048543/0561 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 13, 2018
From: HGST TECHNOLOGIES SANTA ANA, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 047772/0595 →
Continuity (4)
Division 14788658 · Jun 30, 2015
Continuation 13530026 · Jun 21, 2012
Continuation 12511990 · Jul 29, 2009
Related Publication 20190108887A1 · Apr 11, 2019