IP Library › Granted Patent US 10,629,491
Granted Patent B2
US 10,629,491 · App. 16/222,621 · Granted Apr 21, 2020

Semiconductor manufacturing method

Inventors: Che-Cheng Chang (New Taipei, TW); Chih-Han Lin (Hsinchu, TW); Wei-Ting Chen (Hsinchu, TW)
Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
H01L21/823431H01L21/823481H01L21/845H01L27/0886H01L27/1211H01L29/66477H01L29/66545H01L29/66795H01L29/7848
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Quick Facts
Patent No.
US 10,629,491
App. No.
16/222,621
Granted
Apr 21, 2020
Kind
B2
Abstract

A method for manufacturing a semiconductor device includes forming first and second fins over a substrate, forming first and second dummy gate structures over the first and second fins, respectively, replacing the first and second dummy gate structures with first and second gate structures, respectively, and after replacing the first and second dummy gate structures, forming an insulating structure between the first and second gate structures.

Claims (37)

1. A method, comprising:

forming first and second fins over a substrate;

forming a dummy gate structure having first and second portions respectively over the first and second fins and a third portion between the first and second fins;

replacing the first and second portions of the dummy gate structure with first and second gate structures, respectively, wherein the third portion of the dummy gate structure remains between the first and second gate structures after replacing the first and second portions of the dummy gate structure with the first and second gate structures; and

after replacing the first and second portions of the dummy gate structure with the first and second gate structures, replacing the third portion of the dummy gate structure with an insulating structure.

2. The method of claim 1 , wherein a top surface of the third portion of the dummy gate structure has a concave edge in a top view.

3. The method of claim 1 , wherein a bottom portion of the third portion of the dummy gate structure has a larger width than a top portion of the third portion of the dummy gate structure.

4. The method of claim 1 , wherein replacing the first and second portions of the dummy gate structure comprises:

etching the first portion of the dummy gate structure to form a trench; and

forming the first gate structure in the trench.

5. The method of claim 1 , wherein replacing the first and second portions of the dummy gate structure with the first and second gate structures is such that an acute angle is formed between a bottom surface and a sidewall of the third portion of the dummy gate structure.

6. The method of claim 1 , wherein replacing the first and second portions of the dummy gate structure with the first and second gate structures is such that an obtuse angle is formed between a bottom surface and a sidewall of the first gate structure.

7. The method of claim 1 , wherein replacing the first and second portions of the dummy gate structure with the first and second gate structures is such that the first and second gate structures are in contact with the third portion of the dummy gate structure.

8. A method, comprising:

forming first and second fins over a substrate;

forming a dummy structure over the first and second fins;

etching the dummy structure, such that the etched dummy structure has a curved corner; and

after etching the dummy structure, forming first and second gate structures over the first and second fins, respectively, wherein after forming the first and second gate structures, the curved corner of the etched dummy structure is lower than a top surface of the first gate structure.

9. The method of claim 8 , wherein etching the dummy structure is such that a sidewall of the dummy structure is concave.

10. The method of claim 8 , wherein etching the dummy structure is such that a sidewall of the dummy structure is convex.

11. The method of claim 8 , further comprising replacing the dummy structure with an insulating structure.

12. The method of claim 11 , wherein replacing the dummy structure with the insulating structure is such that a bottom portion of the insulating structure has a larger width than a top portion of the insulating structure.

13. The method of claim 8 , wherein etching the dummy structure is such that first and second trenches are formed at opposite sides of the etched dummy structure.

14. The method of claim 13 , wherein forming the first and second gate structures is such that the first and second gate structures are formed in the first and second trenches, respectively.

15. The method of claim 8 , wherein forming the first and second gate structures is such that the first gate structure has a curved corner in contact with the curved corner of the etched dummy structure.

16. A method, comprising:

forming first and second fins over a substrate;

forming a dummy gate structure between and over the first and second fins;

providing a mask over the dummy gate structure between the first and second fins;

etching the dummy gate structure over the first and second fins using the mask as an etch mask;

forming first and second gate structures over the first and second fins, respectively;

after forming the first and second gate structures, removing the dummy gate structure between the first and second gate structures to form a gap; and

forming an insulating structure in the gap.

17. The method of claim 16 , further comprising shaping a top surface of the dummy gate structure such that the top surface of the dummy gate structure has a concave edge in a top view.

18. The method of claim 16 , further comprising shaping the dummy gate structure such that a bottom portion of the dummy gate structure has a concave sidewall.

19. The method of claim 16 , further comprising shaping the dummy gate structure such that a bottom portion of the dummy gate structure has a convex sidewall.

20. The method of claim 16 , further comprising shaping the dummy gate structure such that a bottom portion of the dummy gate structure has a larger width than a top portion of the dummy gate structure.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2018
From: CHANG, CHE-CHENG; LIN, CHIH-HAN; CHEN, WEI-TING
To: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
Reel/Frame 047800/0001 →
Continuity (7)
Continuation 15727626 · Oct 8, 2017
Continuation 15253805 · Aug 31, 2016
Division 14754627 · Jun 29, 2015
Provisional Application 62171050 · Jun 4, 2015
Provisional Application 62158911 · May 8, 2015
Provisional Application 62136295 · Mar 20, 2015
Related Publication 20190122933A1 · Apr 25, 2019