IP Library Granted Patent US 10,770,431
Granted Patent B1
US 10,770,431 · App. 16/287,948 · Granted Sep 8, 2020

Memory die layouts for failure protection in SSDs

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Quick Facts
Patent No.
US 10,770,431
App. No.
16/287,948
Granted
Sep 8, 2020
Kind
B1
Abstract

The present disclosure generally relates to storage devices comprising a memory device having a layout optimized for data failure protection. A storage device comprises a memory device having a first package and a second package disposed adjacent to the first package. The first package comprises an even number of memory die having a first storage capacity, and the second package comprises two memory die having a second storage capacity. A first half of the memory dies of the first package and a first memory die of the second package are coupled to a first channel. A second half of the memory dies of the first package and a second memory die of the second package are coupled to a second channel parallel to the first channel.

Claims (50)

1. A storage device, comprising:

a controller;

a first memory device coupled to the controller, the first memory device comprising non-volatile memory; and

a second memory device coupled to the controller, the second memory device comprising:

a first package coupled to a first channel and to a second channel parallel to the first channel, the first package comprising an even number of memory dies each having a first storage capacity; and

a second package coupled to the first channel and the second channel, the second package comprising two memory dies each having a second storage capacity less than the first storage capacity,

wherein an equal number of memory dies from the first package having the first storage capacity and an equal number of memory dies from the second package having the second storage capacity are disposed on both the first channel and the second channel.

2. The storage device of claim 1 , wherein the second storage capacity of each of the two memory dies is one-half the first storage capacity.

3. The storage device of claim 1 , wherein the first package comprises two, four, or eight memory dies.

4. The storage device of claim 1 , wherein the second package is configured to store recovery data for the first package.

5. The storage device of claim 1 , wherein the second memory device further comprises:

a third channel disposed parallel to the first channel and the second channel;

a fourth channel disposed parallel to the first channel, the second channel, and the third channel;

a third package coupled to the third channel and the fourth channel, the third package comprising an even number of memory dies each having the first storage capacity; and

a fourth package coupled to the first channel and the second channel, the fourth package comprising two memory dies each having the second storage capacity,

wherein an equal number of memory dies from the third package having the first storage capacity and an equal number of memory dies from the fourth package having the second storage capacity are disposed on both the third channel and the fourth channel.

6. The storage device of claim 5 , wherein the second storage capacity of each of the two memory dies is one-fourth the first storage capacity.

7. The storage device of claim 5 , wherein the first package and the third package each comprise the same amount of memory dies.

8. A storage device, comprising:

a first controller;

a first memory device coupled to the first controller, the first memory device comprising non-volatile memory; and

a second memory device coupled to the first controller, the second memory device comprising:

a first package comprising an even number of first memory dies, wherein a first half of the first memory dies are disposed parallel to a second half of the first memory dies, and wherein each of the first memory dies have a first storage capacity;

a second package disposed adjacent to the first package, the second package comprising a set of second memory dies, wherein a first memory die of the set of second memory dies is disposed adjacent to a second memory die of the set of second memory dies, and wherein each of the second memory dies have a second storage capacity less than the first storage capacity of the first memory dies;

a first channel coupled to the first half of the first memory dies of the first package and to the first memory die of the set of the second package; and

a second channel disposed parallel to the first channel, the second channel coupled to the second half of the first memory dies of the first package and to the second memory die of the set of the second package.

9. The storage device of claim 8 , further comprising a second controller coupled to the first controller.

10. The storage device of claim 9 , wherein the first controller is configured to control the first memory device and the second controller is configured to control the second memory device.

11. The storage device of claim 8 , wherein the first storage capacity of each of the first memory dies is twice the second storage capacity of each of the second memory dies.

12. The storage device of claim 8 , wherein the first package comprises two, four, or eight first memory dies.

13. The storage device of claim 8 , wherein the second package is configured to store recovery data for the first package.

14. The storage device of claim 8 , wherein the second memory dies of the second package are configured to store first data, and wherein a first memory die and a second memory die of the first memory dies of the first package are configured to store recovery data.

15. A storage device, comprising:

a first memory device, comprising:

a first package comprising an even number of first memory dies, wherein a first half of the first memory dies are disposed parallel to a second half of the first memory dies, and wherein each of the first memory dies have a first storage capacity;

a second package disposed adjacent to the first package, the second package comprising a set of second memory dies, wherein a first memory die of the set of second memory dies is disposed adjacent to a second memory die of the set of second memory dies, and wherein each of the second memory dies have a second storage capacity less than the first storage capacity of the first memory dies;

a first channel coupled to the first half of the first memory dies of the first package and to the first memory die of the set of the second package;

a second channel disposed parallel to the first channel, the second channel coupled to the second half of first memory dies of the first package and to the second memory die of the set of the second package;

a third package disposed adjacent to the first package, the third package comprising an even number of third memory dies, wherein a first half of the third memory dies are disposed parallel to a second half of the third memory dies, and wherein each of the third memory dies have a third storage capacity;

a fourth package disposed adjacent to the third package and the second package, the fourth package comprising a set of fourth memory dies, wherein a first memory die of the set of fourth memory dies is disposed adjacent to a second memory die of the set of fourth memory dies, and wherein each of the fourth memory dies have a fourth storage capacity less than the third storage capacity less of the third memory dies;

a third channel disposed parallel to the first channel and the second channel, the third channel coupled to the first half of the third memory dies of the third package and to the first memory die of the set of the fourth package; and

a fourth channel disposed parallel to the third channel, the fourth channel coupled to the second half of third memory dies of the third package and to the second memory die of the set of the fourth package.

16. The storage device of claim 15 , wherein the first package and the third package comprise the same amount of memory dies.

17. The storage device of claim 15 , wherein the first storage capacity of the first memory dies is the same as the third storage capacity of the third memory dies, and wherein the second storage capacity of the second memory dies is the same as the fourth storage capacity of the fourth memory dies.

18. The storage device of claim 17 , wherein the second storage capacity of each of the second memory dies and the fourth storage capacity of each of the fourth memory dies is one-fourth the first storage capacity of each of the first memory dies and the third storage capacity of each of third memory dies.

19. The storage device of claim 15 , wherein the second package is configured to store recovery data for the first package, and wherein the fourth package is configured to store recovery data for the third package.

20. The storage device of claim 15 , further comprising:

a first controller coupled to the first memory device;

a second memory device coupled to the first controller, the second memory device comprising non-volatile memory, wherein the first controller is configured to control the second memory device; and

a second controller coupled to the first controller and to the first memory device, wherein the second controller is configured to control the first memory device.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2019
From: HELMICK, DANIEL L.; ANDERSON, KENT
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 048461/0555 →