IP Library Granted Patent US 10,734,558
Granted Patent B2
US 10,734,558 · App. 16/290,084 · Granted Aug 4, 2020

High voltage monolithic LED chip with improved reliability

Inventors: Bradley E Williams (Cary, NC); Kevin W Haberern (Cary, NC); Bennett D Langsdorf (Cary, NC); Manuel L Breva (Morrisville, NC)
Assignee: Cree Huizhou Solid State Lighting Company Limited
H01L33/60H01L25/0753H01L27/15H01L27/156H01L33/08H01L33/382H01L33/405H01L33/46H01L33/62H01L2224/32245H01L2224/32257H01L2224/48091H01L2224/48247H01L2224/73265H01L2924/00014H01L2924/181H01L2933/0016H01L2933/0025H01L2933/0058H01L2933/0066
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Quick Facts
Patent No.
US 10,734,558
App. No.
16/290,084
Granted
Aug 4, 2020
Kind
B2
Abstract

Monolithic LED chips are disclosed comprising a plurality of active regions on a submount, wherein the submount comprises integral electrically conductive interconnect elements in electrical contact with the active regions and electrically connecting at least some of the active regions in series. The submount also comprises an integral insulator element electrically insulating at least some of the interconnect elements and active regions from other elements of the submount. The active regions are mounted in close proximity to one another to minimize the visibility of the space during operation. The LED chips can also comprise layers structures and compositions that allow improved reliability under high current operation.

Claims (28)

1. A monolithic LED chip, comprising:

a plurality of active regions on a submount;

electrically conductive interconnect elements connecting at least two of said active regions, wherein said interconnect elements comprise a material and/or structure that resists electromigration, at least one reflective layer between adjacent active regions and around the edge of said adjacent active regions, wherein said at least one reflective layer reflects light from at least one of said plurality of active regions that would otherwise reach said interconnect elements, wherein said interconnect elements interconnect said active regions from a same side of said active regions.

2. The LED chip of claim 1 , wherein said interconnect elements are in electrical contact with said active regions and electrically connect at least some of said active regions in series.

3. The LED chip of claim 1 , wherein said interconnect element is between said submount and said active regions.

4. The LED chip of claim 1 , wherein said active regions comprise epitaxial layers and wherein the primary emission surface is an epitaxial layer.

5. The LED chip of claim 1 , wherein the primary emission surface is a growth substrate.

6. The LED chip of claim 1 , wherein said interconnect element connects at least two of said active regions in series.

7. The LED chip of claim 1 , wherein said interconnect element comprises layer structures having separate electrically conductive and reflective layers.

8. The LED chip of claim 1 , wherein said conductive interconnect element comprises an interconnection layer comprising a material that resists electromigration under high current operation.

9. The LED chip of claim 8 , wherein said at least one reflective layer has higher reflectivity than said interconnection layer.

10. The LED chip of claim 1 , wherein said at least one reflective layer is electrically isolated from the interconnect elements in said LED chip.

11. The LED chip of claim 1 , wherein said at least one reflective layer is below said active regions and above said interconnect layer.

12. The LED chip of claim 8 , wherein said interconnection layer comprises a plurality of layers in a stack.

13. The LED chip of claim 12 , wherein said plurality of layers comprises at least one adhesion/barrier and electrically conductive layer.

14. The LED chip of claim 1 , wherein said conductive interconnect elements comprise a conductive layer sandwiched between layers of material having higher resistance to electromigration than said conductive layer.

15. A monolithic LED chip, comprising:

a plurality of active regions on a submount;

interconnection layers between said active regions that carry an electrical signal to and are in electrical contact with said active regions, wherein said interconnect layers interconnect said active regions from a same side of said active regions and interconnect said active regions in series; and

a reflective layer positioned below one or more streets between adjacent ones of said plurality of active regions and around the edge of one or more said plurality of active regions, said reflective layer positioned to reflect LED chip light that would otherwise reach said interconnection layers.

16. The LED chip of claim 15 , wherein said reflective layer has a higher reflectivity than said interconnection layers.

17. The LED chip of claim 15 , wherein said interconnection layers comprises a material that resists electromigration under high current operation.

18. The LED chip of claim 15 , wherein said reflective layer is below and between said active regions and above said interconnection layers.

19. A monolithic LED chip, comprising:

a plurality of active regions on a submount;

integral electrically conductive interconnect elements between said active regions, wherein said interconnect elements are in electrical contact with said active regions on a same side of said active regions wherein, wherein said interconnect elements comprise a material and/or structure that resists electromigration; and

a reflective layer at least partially between said interconnect elements and said active regions, wherein said reflective layer is distinct from said interconnect elements.

20. The LED chip of claim 19 , wherein at least one of said interconnect elements comprise a multiple layer stack with at least one layer that resists electromigration, or comprises an alloying material that resists electromigration.

Assignments (5)
PATENT SECURITY AGREEMENT Recorded Jun 30, 2025
From: CREELED, INC.; PENGUIN SOLUTIONS CORPORATION (DE); SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; SMART MODULAR TECHNOLOGIES, INC.; PENGUIN COMPUTING, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 071755/0001 →
RELEASE OF PATENT SECURITY INTEREST RECORDED AT R/F 058983/0001 Recorded Jun 25, 2025
From: CITIZENS BANK, N.A.
To: SMART MODULAR TECHNOLOGIES, INC.; SMART EMBEDDED COMPUTING, INC.; SMART HIGH RELIABILITY SOLUTIONS LLC; CREELED, INC.
Reel/Frame 071725/0207 →
SECURITY INTEREST Recorded Feb 7, 2022
From: SMART MODULAR TECHNOLOGIES, INC.; SMART HIGH RELIABILITY SOLUTIONS, LLC; SMART EMBEDDED COMPUTING, INC.; CREELED, INC.
To: CITIZENS BANK, N.A.
Reel/Frame 058983/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 29, 2021
From: CREE, INC.
To: CREELED, INC.
Reel/Frame 057017/0311 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 22, 2020
From: WILLIAMS, BRADLEY E.; LANGSDORF, BENNETT D.; BREVA, MANUEL L; HABERERN, KEVIN W.
To: CREE, INC.
Reel/Frame 053004/0238 →