Semiconductor package with elastic coupler and related methods
Implementations of semiconductor packages may include: a die coupled to a substrate; a housing coupled to the substrate and at least partially enclosing the die within a cavity of the housing, and; a pin fixedly coupled to the housing and electrically coupled with the die, wherein the pin includes a reversibly elastically deformable lower portion configured to compress to prevent a lower end of the pin from lowering beyond a predetermined point relative to the substrate when the housing is lowered to be coupled to the substrate.
1. A semiconductor package, comprising:
a housing coupled to a substrate;
one or more pins at least temporarily fixedly coupled to the housing, the one or more pins comprising a reversibly elastically deformable lower portion, the reversibly elastically deformable lower portion coupled with a lower end of the one or more pins;
wherein the reversibly elastically deformable lower portion is located in the one or more pins between the housing and the substrate.
2. The semiconductor package of claim 1 , wherein a base of the one or more pins is coupled to the substrate with a spring.
3. The semiconductor package of claim 1 , wherein the one or more pins is at least temporarily fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate.
4. The semiconductor package of claim 1 , wherein the reversibly elastically deformable lower portion comprises a spring.
5. The semiconductor package of claim 1 , wherein the reversibly elastically deformable lower portion is configured to compress to prevent the lower end of the one or more pins from lowering beyond a predetermined point relative to the lower end of the one or more pins when the housing is lowered to be coupled to the substrate.
6. The semiconductor package of claim 1 , wherein a semiconductor die is at least partially enclosed within a cavity of the housing.
7. A semiconductor package, comprising:
a housing coupled to a substrate;
one or more pins at least temporarily fixedly coupled to the housing, the one or more pins comprising a reversibly elastically deformable lower portion, the reversibly elastically deformable lower portion coupled with a lower end of the one or more pins;
wherein the reversibly elastically deformable lower portion is located in the one or more pins between the housing and the substrate; and
wherein the reversibly elastically deformable lower portion is configured to compress when the housing is coupled over the substrate.
8. The semiconductor package of claim 7 , wherein a base of the one or more pins is coupled to the substrate with a spring.
9. The semiconductor package of claim 7 , wherein the one or more pins is at least temporarily fixedly coupled in a top of the housing and is configured to be coupled with the substrate by lowering the housing towards the substrate.
10. The semiconductor package of claim 7 , wherein the reversibly elastically deformable lower portion comprises a spring.
11. The semiconductor package of claim 7 , wherein a semiconductor die is at least partially enclosed within a cavity of the housing.
12. A semiconductor package, comprising:
a housing coupled to a substrate;
one or more pins at least temporarily fixedly coupled in a top of the housing, each of the one or more pins electrically coupled with one of at least one die through a connection trace of the substrate, each of the one or more pins comprising a spring between an upper portion of the one or more pins and a lower portion of the one or more pins;
wherein the spring of each of the one or more pins biases the upper portion of the one or more pins towards the housing; and
wherein the spring is located in the one or more pins between the housing and the substrate.
13. The semiconductor package of claim 12 , wherein the spring comprises a coil spring.
14. The semiconductor package of claim 12 , wherein the spring of each of the one or more pins is compressed along a direction substantially parallel with a longest length of the one or more pins.
15. The semiconductor package of claim 12 , wherein the spring of each of the one or more pins is configured to prevent a contact surface of the one or more pins from lowering beyond a predetermined point relative to the substrate when the housing is lowered towards the substrate.
16. The semiconductor package of claim 12 , wherein the spring is a helical spring.