IP Library Granted Patent US 11,010,057
Granted Patent B2
US 11,010,057 · App. 16/425,483 · Granted May 18, 2021

Storage system and method for storage system calibration

Inventors: Ramanathan Muthiah (Bangalore, IN); Ramkumar Ramamurthy (Bangalore, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/061G06F3/064G06F3/0656G06F3/0688G06F12/0246G06F9/345G06F2212/7201
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Quick Facts
Patent No.
US 11,010,057
App. No.
16/425,483
Granted
May 18, 2021
Kind
B2
Abstract

A storage system, host, and method for storage system calibration are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to: determine a pattern of host writes to the memory; determine whether the pattern of host writes matches a granularity of a logical-to-physical address map used by the storage system; and in response to determining that the pattern of host writes does not match the granularity of the logical-to-physical address map used by the storage system, change the granularity of the logical-to-physical address map used by the storage system. In another embodiment, the storage system calibration is done by host directive. Other embodiments are provided.

Claims (49)

1. A storage system comprising:

a memory; and

a controller in communication with the memory, wherein the controller is configured to:

analyze a history of a plurality of prior write commands received from a host to determine whether the plurality of prior write commands comprise a majority of sequential write commands or a majority of random write commands;

determine whether a granularity of a logical-to-physical address map used by the storage system is optimized for sequential write commands or for random write commands;

in response to determining that the history of the plurality of prior write commands does not match the granularity of the logical-to-physical address map used by the storage system, change the granularity of the logical-to-physical address map used by the storage system to a different granularity; and

receive a new write command from the host, wherein the different granularity does not necessarily match the new write command because the different granularity was changed based on the history of the plurality of prior write commands and not based on the new write command.

2. The storage system of claim 1 , wherein changing the granularity of the logical-to-physical address map comprises making the logical-to-physical address map coarser.

3. The storage system of claim 2 , wherein making the logical-to-physical address map coarser comprises:

consolidating host data;

managing new write entries as a delta file until a coarser logical-to-physical address map is complete; and

flushing the coarser logical-to-physical address map to the memory.

4. The storage system of claim 1 , wherein changing the granularity of the logical-to-physical address map comprises making the logical-to-physical address map finer.

5. The storage system of claim 4 , wherein making the logical-to-physical address map finer comprises:

splitting the logical-to-physical address map into finer entries;

managing new write entries as a delta file until the splitting is complete; and

flushing the split logical-to-physical address map to the memory.

6. The storage system of claim 1 , wherein the controller is further configured to analyze the history in response to a number of the prior write commands exceeding a threshold and/or in response to a positive health determination of the memory.

7. The storage system of claim 1 , wherein the controller is further configured to analyze the history in runtime across a plurality of write cycles.

8. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

9. The storage system of claim 1 , wherein the storage system is configured to be embedded in a host.

10. The storage system of claim 1 , wherein the storage system is configured to be removably connected to a host.

11. A method for storage system calibration, the method comprising:

performing the following in a storage system comprising a memory, wherein the storage system is in communication with a host:

analyzing a plurality of write commands sent to the storage system to determine whether the plurality of prior write commands comprise a majority of sequential write commands or a majority of random write commands;

determining whether a media management layer used by the storage system is optimized for sequential write commands or for random write commands;

in response to determining that the media management layer used by the storage system is optimized for random write commands but that the plurality of prior write commands comprise a majority of sequential write commands, instructing the storage system to make translation mapping performed by the media management layer coarser;

in response to determining that the media management layer used by the storage system results is optimized for sequential write commands but that the plurality of prior write commands comprise a majority of random write commands, instructing the storage system to make translation mapping performed by the media management layer finer; and

sending a new write command to the storage system, wherein the instructed granularity does not necessarily match the new write command because the instructed granularity was changed based on a history of the plurality of prior write commands and not based on the new write command.

12. The method of claim 11 , wherein making translation mapping performed by the media management layer coarser comprises:

consolidating host data;

managing new write entries as a delta file until a coarser media management layer is complete; and

flushing the coarser media management layer to the memory.

13. The method of claim 11 , wherein making translation mapping performed by the media management layer finer comprises:

splitting the media management layer into finer entries;

managing new write entries as a delta file until the splitting is complete; and

flushing the split media management layer to the memory.

14. The method of claim 11 , further comprising determining that the plurality of write commands exceeds a threshold and/or making a positive health determination of the memory.

15. The method of claim 11 , wherein the analyzing is performed in runtime across a plurality of write cycles.

16. A storage system comprising:

a memory;

means for analyzing a history of a plurality of prior write commands sent from the host to a storage system to determine whether the plurality of prior write commands comprise a majority of sequential write commands or a majority of random write commands;

means for determining whether a granularity of a logical-to-physical address map used by the storage system is optimized for sequential write commands or for random write commands;

means for directing, in response to determining that the history of the plurality of prior write commands does not match the granularity of the logical-to-physical address map used by the storage system, the storage system to change the granularity of the logical-to-physical address map used by the storage system to a different granularity; and

means for sending a new write command to the storage system, wherein the different granularity does not necessarily match the new write command because the different granularity was changed based on the history of the plurality of prior write commands and not based on the new write command.

17. The storage system of claim 16 , further comprising means for making the logical-to-physical address map coarser.

18. The storage system of claim 16 , further comprising means for making the logical to physical address map finer.

19. The storage system of claim 16 , wherein the analyzing is performed in response to a number of the prior write commands exceeding a threshold and/or in response to a positive health determination of the memory.

20. The storage system of claim 16 , wherein the analysis is performed in runtime across a plurality of write cycles.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2019
From: MUTHIAH, RAMANATHAN; RAMAMURTHY, RAMKUMAR
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 049310/0117 →
Continuity (1)
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