Updating mapping information during synchronization of memory device
Disclosed herein are related to a controller, a method, and a system for updating mapping information between a logical address and a physical address of a corresponding region of a memory device. In one aspect, the controller generates a plurality of entries, where each entry indicates an update in the mapping information associated with the corresponding region. The controller generates a plurality of headers, where each header is associated with one or more entries in the corresponding region. The controller receives an instruction to synchronize the mapping information stored on the memory device with the update in the mapping information. The controller generates a copy of the plurality of headers in response to receiving the instruction to synchronize. The controller synchronizes the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
1. A device comprising:
a memory device divided into a plurality of regions, the memory device configured to store content data and mapping information between a logical address and a physical address of a corresponding region of the memory device; and
a controller coupled to the memory device, the controller configured to:
generate a plurality of entries, each entry indicating an update in the mapping information associated with the corresponding region,
generate a plurality of headers, each header associated with one or more entries in the corresponding region,
receive an instruction to synchronize the mapping information stored on the memory device with the update in the mapping information,
generate a copy of the plurality of headers in response to receiving the instruction to synchronize, and
synchronize the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
2. The device of claim 1 , wherein each header of the plurality of headers indicates a number of entries in the corresponding region.
3. The device of claim 1 , wherein the controller is configured to:
receive an instruction to modify a region of the memory device while the mapping information is synchronized according to the copy of the plurality of headers and the plurality of entries, and
generate an entry indicating a change in the mapping information associated with the modified region of the memory device, in response to the instruction to modify the region of the memory device.
4. The device of claim 3 , wherein the controller is configured to:
update, during synchronization of the mapping information, a header indicating a number of entries associated with the modified region after the change in the mapping information.
5. The device of claim 4 , wherein the controller is configured to:
maintain, during synchronization of the mapping information, a copy of the header indicating a number of entries associated with the modified region prior to the change in the mapping information.
6. The device of claim 1 , wherein the controller is configured to:
remove the copy of the plurality of headers in response to completing synchronization of the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
7. The device of claim 1 , further comprising:
another memory device coupled to the controller, the another memory device configured to store the plurality of entries and the plurality of headers.
8. The device of claim 7 , wherein the memory device comprises a non-volatile memory device and the another memory device comprises a volatile memory device.
9. A method of operating a memory device divided into a plurality of regions, the method comprising:
generating a plurality of entries, each entry indicating an update in mapping information between a logical address and a physical address for a corresponding region of the memory device;
generating a plurality of headers, each header indicating a number of entries in the corresponding region;
generating a copy of the plurality of headers;
synchronizing the mapping information stored according to the copy of the plurality of headers and the plurality of entries; and
removing the copy of the plurality of headers in response to completing synchronization of the mapping information stored on the memory device according to the copy of the plurality of headers and the plurality of entries.
10. The method of claim 9 , further comprising:
storing the mapping information on the memory device; and
storing the plurality of headers and the plurality of entries on another memory device.
11. The method of claim 10 ,
wherein the memory device comprises a non-volatile memory device, and
wherein the another memory device comprises a volatile memory device.
12. The method of claim 10 , further comprising:
receiving an instruction to synchronize the mapping information according to the copy of the plurality of headers and the plurality of entries,
wherein the copy of the plurality of headers is generated in response to the instruction to synchronize.
13. The method of claim 12 , further comprising:
receiving an instruction to modify a region of the memory device during synchronization of the mapping information according to the copy of the plurality of headers and the plurality of entries; and
generating an entry indicating a change in the mapping information associated with the modified region of the memory device in response to the instruction to modify the region of the memory device.
14. The method of claim 13 , further comprising:
updating, while the mapping information is synchronized, a header indicating a number of entries associated with the modified region after the change in the mapping information.
15. The method of claim 14 , further comprising:
maintaining, while the mapping information is synchronized, a copy of the header indicating a number of entries associated with the modified region prior to the change in the mapping information.
16. A system comprising:
a first memory device divided into a plurality of regions, wherein the first memory device is configured to store content data and mapping information between a logical address and a physical address of a corresponding region of the first memory device;
a second memory device coupled to the first memory device, the second memory device configured to:
store a plurality of entries, each entry indicating an update in the mapping information associated with the corresponding region, and
store a plurality of headers, each header indicating a number of one or more entries in the corresponding region; and
a controller coupled to the first memory device and the second memory device, the controller configured to:
generate a copy of the plurality of headers prior to synchronizing the mapping information stored on the first memory device with the update in the mapping information,
update, during synchronization of the mapping information, a header indicating a number of entries associated with a modified region after a change in the mapping information, and
maintain, during synchronization of the mapping information, the copy of the header indicating the number of entries associated with the modified region prior to the change in the mapping information.
17. The system of claim 16 , wherein the first memory device is a non-volatile memory device and the second memory device is a volatile memory device.
18. The system of claim 17 , wherein the controller is configured to store the copy of the plurality of headers on the second memory device.
19. The system of claim 16 , wherein the controller is further configured to:
remove the copy of the plurality of headers in response to completing the synchronization of the mapping information.
20. A system comprising:
means for generating a plurality of entries, each entry indicating an update in mapping information between a logical address and a physical address for a corresponding region of a memory device;
means for generating a plurality of headers, each header indicating a number of entries in the corresponding region;
means for generating a copy of the plurality of headers;
means for synchronizing the mapping information stored according to the copy of the plurality of headers and the plurality of entries; and
means for removing the copy of the plurality of headers in response to completing synchronization of the mapping information.