Host emulator
View Patent ↗Technology is described herein that provides a memory device configured to receive first memory access requests from a host system on a host connection while the non-volatile memory device is in a first mode. The first memory access requests to allow the host system to access the non-volatile memory cells in accordance with a memory access protocol. The memory device is configured to initiate second memory access requests internally in accordance with the memory access protocol while the non-volatile memory device is in a second mode. The memory device is configured to implement a memory controller side of the memory access protocol to respond to the first memory access requests while the non-volatile memory device is in the first mode and to respond to the second memory access requests while the non-volatile memory device is in the second mode.
1. A non-volatile memory device comprising:
a host connection configured to control data transfer with a host system;
a memory structure comprising non-volatile memory cells; and
one or more control circuits in communication with the memory structure and the host connection, the one or more control circuits configured to:
receive first memory access requests from the host system on the host connection while the non-volatile memory device is in a first mode, the first memory access requests to allow the host system to access the non-volatile memory cells in accordance with a memory access protocol;
initiate second memory access requests internally in accordance with the memory access protocol while the non-volatile memory device is in a second mode; and
implement a memory controller side of the memory access protocol to respond to the first memory access requests while the non-volatile memory device is in the first mode and to respond to the second memory access requests while the non-volatile memory device is in the second mode; and
process command completion notices for the second memory access requests internally while the non-volatile memory device is in the second mode.
2. The non-volatile memory device of claim 1 , wherein the one or more control circuits are further configured to:
instruct the memory controller side of the memory access protocol to provide the command completion notices to the second memory access requests to a location inside of the non-volatile memory device.
3. The non-volatile memory device of claim 1 wherein:
the host connection comprises non-transitory storage and is configured to control data transfer with the host system at a physical level using the non-transitory storage while in the first mode; and
the one or more control circuits are further configured to use the non-transitory storage to store the second memory access requests when in the second mode.
4. The non-volatile memory device of claim 1 wherein:
the host connection comprises non-transitory storage and is configured to control data transfer with the host system at a physical level using the non-transitory storage while in the first mode; and
the one or more control circuits are further configured to use the non-transitory storage to store data associated with the second memory access requests when in the second mode.
5. The non-volatile memory device of claim 1 , wherein the one or more control circuits further comprise:
a data generator configured to generate data for the second memory access requests.
6. The non-volatile memory device of claim 1 , wherein the one or more control circuits are further configured to:
issue the second memory access requests over the host connection to test a memory device external to the non-volatile memory device while in the second mode.
7. The non-volatile memory device of claim 1 , wherein the one or more control circuits are further configured to:
emulate a host side of the memory access protocol while the non-volatile memory device is the second mode, including issue the second memory access requests in accordance with the memory access protocol.
8. The non-volatile memory device of claim 1 , wherein the memory access protocol comprises one or more of Non-Volatile Memory Express (NVMe), Advanced Host Computer Interface (AHCI), Serial Advanced Technology Attachment (SATA), MultiMediaCard (MMC), eMMC, Universal Serial Bus (USB), Serial Attached Small Computer Systems Interface SCSI, Fibre Channel Protocol (FCP), and Universal Flash Storage (UFS).
9. A method of operating a non-volatile storage device, the method comprising:
receiving first memory access requests from external to the non-volatile storage device while in a first mode of the non-volatile storage device, the first memory access requests compliant with a memory access protocol that enables access to non-volatile memory in the non-volatile storage device from a host system external to the non-volatile storage device;
responding to the first memory access requests by a memory controller within the non-volatile storage device while in the first mode, including transferring data between the non-volatile memory and non-transitory storage in the host system;
initiating second memory access requests from within the non-volatile storage device while in a second mode of the non-volatile storage device, the second memory access requests compliant with the memory access protocol, including adding the second memory access requests to one or more command submission queues within the non-volatile storage device; and
responding to the second memory access requests by the memory controller while in the second mode.
10. The method of claim 9 , wherein responding to the second memory access requests by the memory controller while in the second mode comprises:
transferring data between the non-volatile memory and non-transitory storage within the non-volatile storage device to satisfy the second memory access requests without transferring any data between the non-volatile memory and non-transitory storage external to the non-volatile storage device.
11. The method of claim 9 , wherein responding to the second memory access requests by the memory controller while in the second mode comprises:
generating data within the non-volatile storage device; and
storing the generated data in the non-volatile memory.
12. The method of claim 9 , wherein responding to the second memory access requests by the memory controller while in the second mode further comprises:
adding command status to the second memory access requests to one or more command completion queues within the non-volatile storage device.
13. A non-volatile memory device comprising:
non-volatile memory cells; and
a non-volatile memory controller comprising:
a host connection configured to communicate with an external host controller at a physical level and at a link level;
a host interface configured to communicate with the external host controller at a logical level via the host connection to control external access to the non-volatile memory cells while the non-volatile memory controller is in a functional mode;
means for emulating the external host controller while the non-volatile memory controller is in a host emulator mode; and
means for issuing memory access commands internally to the host interface.
14. The non-volatile memory device of claim 13 , wherein:
the means for emulating the external host controller is configured to instruct the host interface to communicate with the means for emulating the external host controller when in the host emulator mode.
15. The non-volatile memory device of claim 13 , wherein:
the host connection comprises non-transitory storage;
the host connection is configured to use the non-transitory storage for control of data transfer with the external host controller while in the functional mode; and
the means for emulating the external host controller is further configured to use the non-transitory storage to store the memory access commands while in the host emulator mode.
16. The non-volatile memory device of claim 13 , wherein:
the means for emulating the external host controller is further configured to issue memory access commands externally over the host connection while in the host emulator mode to test a host connection in another non-volatile memory device.
17. The non-volatile memory device of claim 13 , wherein the non-volatile memory controller further comprises:
a data generator configured to generate data for memory access requests while in the host emulator mode.
18. The non-volatile memory device of claim 13 , wherein the means for emulating the external host controller is further configured to:
initialize the host interface in response to the non-volatile memory controller being configured to be in the host emulator mode.