Energy optimized power state declarations for solid state drives
A solid state device is disclosed comprising an array of memory units, an interface connected to the memory units, at least one arrangement to monitor a temperature of the solid state device and an arrangement to monitor low power mode statistics of the solid state device and compare the low power mode statistics to a critical usage point power threshold at a temperature measured, wherein the arrangement to monitor the low power mode statistics of the solid state device is further configured to change a power mode of the solid state device based upon the low power mode statistics.
1. A solid state device, comprising:
an array of memory units configured to store data;
an interface connected to the memory units, wherein the interface is configured to enable transfer of data to and from the array of memory units; and
an arrangement configured to:
monitor low power mode statistics of the solid state device; and
compare the low power mode statistics to a critical usage point power threshold at a temperature measured.
2. The solid state device according to claim 1 , further comprising:
at least one arrangement configured to monitor a temperature of the solid state device.
3. The solid state device according to claim 1 , wherein the array of memory units is a non-volatile memory.
4. The solid state device according to claim 3 , wherein the non-volatile memory is a NAND flash unit.
5. The solid state device according to claim 1 , wherein the arrangement configured to monitor the low power mode statistics of the solid state device is further configured to change a power mode of the solid state device based upon the low power mode statistics.
6. The solid state device according to claim 1 , further comprising:
a temperature monitoring arrangement configured to measure an internal temperature of the solid state device.
7. The solid state device according to claim 5 , wherein at least one memory unit is a NAND flash unit.
8. The solid state device according to claim 5 , wherein the array of memory units is an array of NAND flash units.
9. A method for changing a mode of a solid state device connected to a host, the method comprising:
one of entering an active mode and operating the solid state device in an active mode;
calculating a frequency of usage of the solid state device;
comparing the frequency of usage of the solid state device to a critical point; and
updating a power state data structure for the solid state device with statistics of the solid state device responsive to the frequency of usage of the solid state device exceeding the critical point.
10. The method according to claim 9 , further comprising:
accumulating statistics of the solid state device during operation in the active mode;
returning to the one of entering the active mode and operating the solid state device in the active mode responsive to the frequency of usage of the solid state device exceeding the critical point; and
entering a low power mode for the solid state device responsive to the frequency of usage of the solid state device being less than or equal to the critical point.
11. The method according to claim 10 , wherein the accumulating statistics of the solid state device during operation in the active mode includes accumulating statistics on entry and time of presence of the solid state device in an operating mode.
12. The method according to claim 10 , further comprising:
calculating a ratio of number of entries for a power state divided by time of presence in the power state.
13. The method according to claim 9 , wherein the active mode is a low power mode.
14. The method according to claim 9 , wherein the updating the power state data structure for the solid state device with statistics is performed within a controller for the solid state device.
15. An apparatus for conducting a method for changing a mode of a solid state device, the apparatus comprising:
means for one of entering an active mode and operating the solid state device in an active mode;
means for accumulating statistics of the solid state device during operation in the active mode;
means for updating a power state data structure for the solid state device with statistics of the solid state device;
means for returning to the one of entering the active mode and operating the solid state device in the active mode; and
means for entering a low power mode for the solid state device.
16. The apparatus according to claim 15 , further comprising:
means for calculating a ratio of number of entries for a power state divided by time of presence in the power state.
17. The apparatus according to claim 15 , wherein the active mode is a low power mode.
18. The apparatus according to claim 15 , wherein the statistics are power related statistics for the solid state device.
19. The apparatus according to claim 15 , wherein the updating the power state data structure for the solid state device with statistics of the solid state includes disabling the low power mode.
20. The apparatus according to claim 15 , wherein a frequency of usage is defined by a ratio of number of entries for a power state divided by time of presence in the power state.