IP Library Granted Patent US 10,862,512
Granted Patent B2
US 10,862,512 · App. 16/452,466 · Granted Dec 8, 2020

Data driven ICAD graph generation

Inventors: Dudy David Avraham (Even Yehuda, IL); Eran Sharon (Rishon Lezion, IL); Omer Fainzilber (Herzeliya, IL); Ran Zamir (Ramat Gan, IL); Stella Achtenberg (Netanya, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
H03M13/353G06F11/1068G11C29/52
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Quick Facts
Patent No.
US 10,862,512
App. No.
16/452,466
Granted
Dec 8, 2020
Kind
B2
Abstract

A storage device may include a decoder configured to connect bits to a content node based on content-aware decoding process. The content-aware decoding process may be dynamic and determine connection structures of bits and content nodes based on patterns in data. In some cases, the decoder may connect non-adjacent bits to a content node based on a content-aware decoding process. In other cases, the decoder may connect a first number of bits to a first content node and a second number of bits to a second content node. In such cases, the first number of bits and the second number of bits are a different number.

Claims (54)

1. A storage device, comprising:

an interface;

at least one memory device;

a controller coupled to the at least one memory device; and

a decoder configured to connect a first number of non-adjacent bits to a content node based on a content-aware decoding process, and a second number of non-adjacent bits to a second content node based on the content-aware decoding process, wherein the first number of non-adjacent bits and second number of non-adjacent bits are different.

2. The storage device of claim 1 , wherein the connection of non-adjacent bits is based on a determination of a pattern in data.

3. The storage device of claim 1 , wherein each iteration of the content-aware decoding process connects a different set of non-adjacent bits to the content node.

4. A storage device, comprising:

an interface;

at least one memory device;

a controller coupled to the at least one memory device; and

a decoder configured to connect non-adjacent bits to a content node based on a content-aware decoding process, wherein connecting non-adjacent bits to the content node includes a frequency calculation that groups repeating data.

5. The storage device of claim 4 , wherein the frequency calculation comprises a Fast Fourier transform (FFT).

6. A storage device, comprising:

an interface;

at least one memory device;

a controller coupled to the at least one memory device; and

a decoder configured to connect non-adjacent bits to a content node based on a content-aware decoding process, wherein connecting non-adjacent bits to the content node includes auto-correlation.

7. The storage device of claim 6 , wherein connecting non-adjacent bits to the content node includes spectral analysis of the auto-correlation.

8. The storage device of claim 1 , wherein connecting non-adjacent bits includes reordering data based on inherent data frequencies.

9. A storage device, comprising:

an interface;

at least one memory device;

a controller coupled to the at least one memory device; and

a decoder configured to connect non-adjacent bits to a content node based on a content-aware decoding process, wherein connecting non-adjacent bits is based on permuting a set of bits within a set content node structure.

10. A storage device, comprising:

an interface;

at least one memory device;

a controller coupled to the at least one memory device; and

a decoder configured to connect, based on a content-aware decoding process:

a first number of bits to a first content node, and

a second number of bits to a second content node,

wherein the first number of bits and the second number of bits are different.

11. The storage device of claim 10 , wherein the first content node is connected to a different number of bits in each iteration of the content-aware decoding process.

12. The storage device of claim 11 , wherein the second content node is connected to a different number of bits in each iteration of the content-aware decoding process.

13. The storage device of claim 12 , wherein the number of bits connected to the first content node and the second content node is different for each iteration of the content-aware decoding process.

14. The storage device of claim 10 , wherein the decoder is configured to connect a third number of bits to a third content node, wherein the third number of bits is the same as the first number of bits or the second number of bits.

15. The storage device of claim 10 , wherein the decoder is configured to connect a third number of bits to a third content node, wherein the third number of bits is different than the first number of bits and the second number of bits.

16. The storage device of claim 10 , wherein the connection is based on at least one of:

a frequency calculation;

auto-correlation;

spectral analysis of the auto correlation;

inherent data frequencies; and

a permutation of bits within a set content node structure.

17. A storage device, comprising:

means for determining a pattern in data; and

means for connecting bits to a set of content nodes based on the pattern in the data, that includes at least one of:

means to connect non-adjacent bits to each content node; and

means to connect a different number of bits to each content node wherein the bits are either:

non-adjacent; or

unequal in number; or

combinations thereof.

18. The storage device of claim 17 , wherein the means for determining a pattern in data determines the pattern from a decoder.

19. The storage device of claim 17 , wherein the means for connecting bits to a set of content nodes connects bits from a decoder.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 1, 2019
From: AVRAHAM, DUDY DAVID; SHARON, ERAN; FAINZZILBER, OMER; ZAMIR, RAN; ACHTENBERG, STELLA
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 049646/0579 →