Error correction scheme in flash memory
An error correction scheme in flash memory. Methods include extending a lifetime of a memory block, including: receiving an indication that an error occurred during a write operation at a first location in a memory block, the first location associated with a faulty page of the memory block; and performing a modified exclusive OR (XOR) scheme on the memory block by: performing a de-XOR operation that generates recovery data of the faulty page; storing the recovery data in a location different from the faulty page of memory; marking the faulty page for exclusion in future de-XOR operations; and performing a parity calculation that generates an updated parity value that includes all pages of the memory block that have been programmed except for the faulty page.
1. A method of extending a lifetime of a memory block, comprising:
receiving an indication that an error occurred during a write operation at a first location in a memory block, the first location associated with a faulty page of the memory block;
performing a modified exclusive OR (XOR) scheme on the memory block by:
performing a de-XOR operation that generates recovery data of the faulty page;
storing the recovery data in a location different from the faulty page of memory;
marking the faulty page for exclusion in future de-XOR operations; and
performing a parity calculation that generates an updated parity value that includes all pages of the memory block that have been programmed except for the faulty page;
receiving a second indication that an additional error occurred during a different write operation to the memory block, wherein the additional error is associated with a second faulty page; and
performing the modified XOR scheme an additional time on the memory block by:
performing an additional de-XOR operation starting with a first valid page of the memory block, wherein the additional de-XOR operation generates a second recovery data;
determining the second faulty page is located at the end of the memory block, in response to determining the second faulty page is located at the end of the memory block,
moving the second recovery data from the memory block; and
marking the memory block for garbage collection.
2. The method claim 1 , wherein marking the faulty page for exclusion further comprises, updating status data in a bit map, wherein the status data is associated with a status of the faulty page, wherein the bit map is located in a header of a parity page.
3. The method of claim 2 , wherein performing the de-XOR operation, further comprises starting with a first valid page of the memory block.
4. The method of claim 1 , wherein performing the modified XOR scheme an additional time further comprises, prior to performing the additional de-XOR operation,
reading a header of a parity page; and
determining, based on information in the header that the faulty page is excluded from the modified XOR scheme.
5. The method of claim 1 , wherein a result of excluding the faulty page is a subsequent de-XOR operation is performed using two non-adjacent pages.
6. The method of claim 1 , further comprising:
tracking a number of pages excluded from the modified XOR scheme, wherein the pages are marked invalid; and
retiring the memory block in response to determining the number of pages is above a threshold amount.
7. A memory controller, comprising:
a first terminal configured to couple to a memory array,
the memory controller configured to:
receive an indication that an error occurred during a write operation at a first location in a memory block, the first location associated with a faulty page of the memory block;
perform a modified exclusive OR (XOR) scheme at a first time on the memory block, wherein the memory controller is further configured to:
perform a de-XOR operation starting with a page of the memory block that is valid, wherein the de-XOR operation generates recovery data of the faulty page;
store the recovery data in a location different from the faulty page;
mark the faulty page for exclusion in future de-XOR operations; and
perform a parity calculation that generates an updated parity value that includes all pages of the memory block that have been programmed except for the faulty page;
receive a second indication that an additional error occurred during a different write operation to the memory block, wherein the additional error is associated with a second faulty page; and
perform the modified XOR scheme at a second time on the memory block, wherein the memory controller is further configured to:
perform an additional de-XOR operation that starts with a page of the memory block, wherein the additional de-OXR operation generates second recovery data;
determine the second faulty page of memory is located at the end of the memory block; in response to determining the second faulty page is located at the end of the memory block,
move the second recovery data from the memory block; and
mark the memory block for garbage collection.
8. The memory controller of claim 7 , wherein marking the faulty page for exclusion further comprises, updating status data in a bit map, wherein the status data is associated with a status of the faulty page, wherein the bit map is located in a header of a parity page.
9. The memory controller claim 7 , wherein when the memory controller performs the modified XOR scheme at a second time, the memory controller is further configured to, prior to performing the additional de-XOR operation,
read a header of a parity page; and
determine, based on information in the header that the faulty page is excluded from the modified XOR scheme.
10. The memory controller of claim 7 , wherein a result of excluding the faulty page is a subsequent de-XOR operation is performed using two non-adjacent pages.
11. The memory controller of claim 7 , further configured to:
track a number of pages excluded from the modified XOR scheme, wherein the pages are marked invalid; and
retire the memory block in response to determining the number of pages is above a threshold amount.
12. The memory controller of claim 11 , wherein the memory controller is configured to retire the memory block by marking the memory block for garbage collection.