Perpendicular spin transfer torque MRAM memory cell with in-stack thermal barriers
A perpendicular spin transfer torque MRAM memory cell includes a magnetic tunnel junction stack comprising a pinned layer having a fixed direction of magnetization, a free layer having a direction of magnetization that can be switched, a tunnel barrier between the pinned layer and the free layer, a cap layer above the free layer and one or more in-stack multi-layer thermal barrier layers having multiple internal interfaces between materials. The thermal barrier layers have high enough thermal resistivity to maintain the heat generated in the memory cell and low enough electrical resistivity to not materially change the electrical resistance of the memory cell. One embodiment further includes a thermal barrier liner surrounding the free layer, pinned layer, tunnel barrier and cap layer.
1. A non-volatile memory apparatus, comprising:
a magnetic tunnel junction stack comprising:
a pinned layer having a fixed direction of magnetization that is perpendicular to a plane of the pinned layer;
a free layer having a direction of magnetization that can be switched and is perpendicular to a plane of the free layer;
a first in-stack multi-layer thermal barrier having multiple internal interfaces between materials; and
a thermal barrier liner positioned at a side of the free layer, the thermal barrier liner has a higher electrical resistance than the first in-stack multi-layer thermal barrier;
the pinned layer, the free layer and the first in-stack multi-layer thermal barrier form a single vertical stack of materials.
2. The non-volatile memory apparatus of claim 1 , wherein:
the thermal barrier liner surrounds at least a portion of magnetic tunnel junction stack.
3. The non-volatile memory apparatus of claim 2 , wherein the magnetic tunnel junction stack further comprises:
a tunnel barrier layer positioned between the pinned layer and the free layer; and
an in-stack cap layer.
4. The non-volatile memory apparatus of claim 3 , wherein:
the magnetic tunnel junction is configured such that a current applied through the the in-stack cap layer and the tunnel barrier layer creates heat in the magnetic tunnel junction stack; and
the free layer is configured to switch direction of magnetization between parallel and anti-parallel to the direction of magnetization of the pinned layer in response to spin transfer torque generated in response to the electrical write current and the heat generated in response to the electrical write current.
5. The non-volatile memory apparatus of claim 1 , wherein the magnetic tunnel junction stack further comprises:
a second in-stack multi-layer thermal barrier, the first in-stack multi-layer thermal barrier is positioned at a first end of the magnetic tunnel junction stack, the second in-stack multi-layer thermal barrier is positioned at a second end of the magnetic tunnel junction stack.
6. The non-volatile memory apparatus of claim 1 , wherein:
the first in-stack multi-layer thermal barrier includes multiple layers of a first material interleaved with multiple layers of a second material.
7. The non-volatile memory apparatus of claim 1 , wherein:
the first in-stack multi-layer thermal barrier comprises alternating layers of MgO and Ru; and
the multiple internal interfaces between materials comprises interfaces between layers of MgO and layers of Ru.
8. The non-volatile memory apparatus of claim 1 , wherein:
the first in-stack multi-layer thermal barrier comprises thermal switch material including one of vanadium oxide, niobium oxide or ovonic threshold switch material.
9. The non-volatile memory apparatus of claim 1 , wherein:
the first in-stack multi-layer thermal barrier comprises one of alternating layers of MgO and Ru, alternating layers of MgO and Ta, alternating layers of VO 2 and Al 2 O 3 , alternating layers of VO 2 and MgO, and alternating layers of TiN and MgO.
10. The non-volatile memory apparatus of claim 1 , wherein:
the first in-stack multi-layer thermal barrier is configured to generate a gradient of temperature across the magnetic tunnel junction stack in a direction perpendicular to the plane of the free layer, the plane of the free layer is parallel to the plane of the pinned layer, the gradient of temperature across the magnetic tunnel junction stack generates thermal spin torque on the free layer that is configured to assist the free layer to switch direction of magnetization.
11. A method of operating a MRAM memory cell, the MRAM memory cell includes a pinned layer and a free layer, the pinned layer has a fixed direction of magnetization that is perpendicular to a plane of the pinned layer, the free layer has a direction of magnetization that can be switched and is perpendicular to a plane of the free layer, the MRAM memory cell also includes a thermal barrier layer and a tunnel barrier layer, the tunnel barrier layer is positioned between the pinned layer and the free layer, the MRAM memory cell also includes a cap layer, the method comprising:
applying an electrical write current through the pinned layer, the free layer, the tunnel barrier layer, the cap layer and the thermal barrier layer;
generating heat in the MRAM memory cell in response to the electrical write current through the tunnel barrier layer and the cap layer;
maintaining the heat using the thermal barrier layer, the thermal barrier layer having high enough thermal resistivity to maintain the heat and low enough electrical resistivity to not materially change the electrical write current, the thermal barrier layer comprises multiple layers of materials with multiple internal interfaces between materials, the multiple interfaces create thermal resistance;
maintaining the heat using a thermal barrier liner surrounding at least the free layer, the thermal barrier liner having a higher electrical resistance than the thermal barrier layer; and
switching the direction of magnetization of the free layer between parallel and anti-parallel to the direction of magnetization of the pinned layer in response to spin transfer torque generated in response to the electrical write current and the heat generated in response to the electrical write current.
12. The method of claim 11 , further comprising:
applying an electrical read current through the pinned layer, the free layer, the tunnel barrier layer and the thermal barrier layer in order to test electrical resistance of the pinned layer, the free layer, and the tunnel barrier layer.
13. A non-volatile memory apparatus, comprising:
a pinned layer having a fixed direction of magnetization that is perpendicular to a plane of the pinned layer;
a free layer having a direction of magnetization that can be switched using spin transfer torque and is perpendicular to a plane of the free layer;
a first thermal barrier layer in line with the pinned layer and the free layer such that an electrical current can be applied through the first thermal barrier layer, the free layer and the pinned layer;
a cap layer positioned between the free layer and the first thermal barrier layer;
a second thermal barrier layer in line with the pinned layer and the free layer; and
a thermal barrier liner surrounding the free layer, the thermal barrier liner has a higher electrical resistance than the first thermal barrier layer.
14. The non-volatile memory apparatus of claim 13 , wherein:
the first thermal barrier layer comprises multiple layers of materials with multiple internal interfaces between the materials, the multiple interfaces create thermal resistance; and
the second thermal barrier layer comprises multiple layers of materials with multiple internal interfaces between the materials, the multiple interfaces create thermal resistance.
15. The non-volatile memory apparatus of claim 14 , wherein:
the free layer is configured to switch direction of magnetization between parallel and anti-parallel to the direction of magnetization of the pinned layer in response to spin transfer torque generated in response to the electrical current and the heat generated in response to the electrical current; and
the heat is maintained by the first thermal barrier layer, the second thermal barrier layer and the thermal barrier liner.