IP Library › Granted Patent US 10,974,433
Granted Patent B2
US 10,974,433 · App. 16/460,346 · Granted Apr 13, 2021

Gate-all-around fin device

Inventors: John B. Campi, Jr. (Westford, VT); Robert J. Gauthier, Jr. (Williston, VT); Rahul Mishra (Essex Junction, VT); Souvick Mitra (Essex Junction, VT); Mujahid Muhammad (Essex Junction, VT)
Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
B29C48/49B29C37/0025B29C48/21B32B3/08B32B7/02B32B27/00B32B27/08B32B27/28B32B27/306B32B27/308B32B27/32B32B27/34B32B27/36H01G4/005H01G4/14H01G4/20H01G4/206H01G4/228H01G4/30H01G4/33H01L21/266H01L21/26513H01L21/823412H01L21/823431H01L21/823475H01L21/823481H01L21/823493H01L27/0886H01L29/0649H01L29/0653H01L29/0657H01L29/0696H01L29/086H01L29/0865H01L29/0869H01L29/0882H01L29/0886H01L29/1045H01L29/1095H01L29/4236H01L29/4238H01L29/42376H01L29/42392H01L29/66681H01L29/66704H01L29/66712H01L29/66734H01L29/66795H01L29/7802H01L29/7809H01L29/7811H01L29/7816H01L29/7825H01L29/7851H01L29/7856B29K2023/12B29K2105/16B29K2507/04B29K2995/0005B29K2995/0007B29L2009/003B29L2009/005B29L2031/34B32B2262/106B32B2264/105B32B2264/12B32B2270/00B32B2274/00B32B2307/202B32B2307/204B32B2307/206B32B2307/518B32B2307/732B32B2457/16H01L2029/7858
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Quick Facts
Patent No.
US 10,974,433
App. No.
16/460,346
Granted
Apr 13, 2021
Kind
B2
Abstract

A gate-all around fin double diffused metal oxide semiconductor (DMOS) devices and methods of manufacture are disclosed. The method includes forming a plurality of fin structures from a substrate. The method further includes forming a well of a first conductivity type and a second conductivity type within the substrate and corresponding fin structures of the plurality of fin structures. The method further includes forming a source contact on an exposed portion of a first fin structure. The method further comprises forming drain contacts on exposed portions of adjacent fin structures to the first fin structure. The method further includes forming a gate structure in a dielectric fill material about the first fin structure and extending over the well of the first conductivity type.

Claims (21)

1. A method comprising:

forming a first doped well located in a substrate of a first conductivity type;

forming a second doped well of a second conductivity type located in the substrate adjacent to the first doped well;

forming a first doped fin of the first conductivity type located over a first portion of the second doped well;

forming a second doped fin of the second conductivity type located over a second portion of the second doped well;

forming a gate structure located adjacent to the first doped fin over the second doped well; and

forming a source contact located over the first doped fin,

wherein the first doped fin includes alternating p regions and n regions.

2. The method of claim 1 , wherein the gate structure is formed in a dielectric fill material.

3. The method of claim 1 , wherein the first doped well is of the first conductivity type.

4. The method of claim 3 , wherein:

the second doped well is formed as a continuous shallow N-well and the first doped well is formed as a P-well; and

the gate structure is formed completely over the continuous shallow N-well.

5. The method of claim 4 , wherein the first doped fin is formed as a floating P-fin.

6. The method of claim 5 , further comprising forming a drain contact over the second doped fin.

7. The method of claim 6 , wherein the drain contact is formed as an N-doped region.

8. The method of claim 6 , wherein the source and drain contacts and the gate structure are formed completely over the continuous shallow N-well.

9. The method of claim 8 , wherein the first doped well is formed to surround the second doped well.

10. The method of claim 9 , wherein the gate structure is formed between the first doped fin and the second doped fin.

11. The method of claim 6 , wherein the source contact is formed on an n+ region of the first doped fin and the drain contact is formed on an n+ region of the second doped fin.

12. The method of claim 1 , wherein the gate structure is formed as a wraparound gate structure which wraps around the first doped fin.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2019
From: CAMPI, JOHN B., JR.; GAUTHIER, ROBERT J., JR.; MISHRA, RAHUL; MITRA, SOUVICK; MUHAMMAD, MUJAHID
To: INTERNATIONAL BUSINESS MACHINES CORPORATION
Reel/Frame 049656/0051 →
Continuity (5)
Continuation 15819486 · Nov 21, 2017
Continuation 15171288 · Jun 2, 2016
Continuation 14882809 · Oct 14, 2015
Division 14547780 · Nov 19, 2014
Related Publication 20190326438A1 · Oct 24, 2019
Cited By (1)
US 12,550,392