Semiconductor device having resistance elements and fabrication method thereof
A semiconductor device includes as a resistance element a first polycrystalline silicon and a second polycrystalline silicon containing impurities, such as boron, of the same kind and having different widths. The first polycrystalline silicon contains the impurities at a concentration C X . The second polycrystalline silicon has a width larger than a width of the first polycrystalline silicon and contains the impurities of the same kind at a concentration C Y lower than the concentration C X . A sign of a temperature coefficient of resistance (TCR) of the first polycrystalline silicon changes at the concentration C X . A sign of a TCR of the second polycrystalline silicon changes at the concentration C Y .
1. A semiconductor device comprising:
a first polycrystalline silicon having a negative temperature coefficient and having a first width; and
a second polycrystalline silicon having a positive temperature coefficient and having a second width larger than the first width, wherein:
the first polycrystalline silicon contains first impurities at a first concentration throughout a direction perpendicular to a direction of the first width, in a plan view; and
the second polycrystalline silicon contains the first impurities at a second concentration lower than the first concentration throughout a direction perpendicular to a direction of the second width, in the plan view.
2. The semiconductor device according to claim 1 , wherein the first concentration and the second concentration are higher than or equal to 1×10 20 cm −3 and lower than or equal to 1×10 21 cm −3 .
3. The semiconductor device according to claim 1 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series.
4. The semiconductor device according to claim 1 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in parallel.
5. The semiconductor device according to claim 1 , wherein one end portion of the first polycrystalline silicon and one end portion of the second polycrystalline silicon are electrically connected in series.
6. The semiconductor device according to claim 1 , wherein:
one end portion of the first polycrystalline silicon and one end portion of the second polycrystalline silicon are electrically connected;
the other end portion of the first polycrystalline silicon and the other end portion of the second polycrystalline silicon are electrically connected; and
the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in parallel.
7. The semiconductor device according to claim 1 , wherein the first impurities are p-type impurities.
8. The semiconductor device according to claim 1 , wherein the first polycrystalline silicon and the second polycrystalline silicon are formed as continuous one body and electrically connected.
9. The semiconductor device according to claim 8 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series.
10. The semiconductor device according to claim 1 , wherein a first sheet resistance of the first polycrystalline silicon is higher than a second sheet resistance of the second polycrystalline silicon.
11. A semiconductor device comprising:
a first polycrystalline silicon having a negative temperature coefficient and having a first width; and
a second polycrystalline silicon having a positive temperature coefficient and having a second width larger than the first width, wherein:
the first polycrystalline silicon and the second polycrystalline silicon are provided in a same layer;
the first polycrystalline silicon contains first impurities at a first concentration; and
the second polycrystalline silicon contains the first impurities at a second concentration lower than the first concentration.
12. The semiconductor device according to claim 11 , wherein:
the first polycrystalline silicon contains the first impurities at the first concentration throughout a direction perpendicular to a direction of the first width, in a plan view; and
the second polycrystalline silicon contains the first impurities at the second concentration throughout a direction perpendicular to a direction of the second width, in the plan view.
13. The semiconductor device according to claim 11 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series.
14. The semiconductor device according to claim 11 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in parallel.
15. The semiconductor device according to claim 11 , wherein the first polycrystalline silicon and the second polycrystalline silicon are formed as continuous one body and electrically connected.
16. The semiconductor device according to claim 11 , wherein a first sheet resistance of the first polycrystalline silicon is higher than a second sheet resistance of the second polycrystalline silicon.
17. A semiconductor device comprising:
a first polycrystalline silicon having a negative temperature coefficient and having a first width; and
a second polycrystalline silicon having a positive temperature coefficient and having a second width larger than the first width, wherein:
the first polycrystalline silicon contains first impurities at a first concentration;
the second polycrystalline silicon contains the first impurities at a second concentration lower than the first concentration; and
a first sheet resistance of the first polycrystalline silicon is higher than a second sheet resistance of the second polycrystalline silicon.
18. The semiconductor device according to claim 17 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in series.
19. The semiconductor device according to claim 17 , wherein the first polycrystalline silicon and the second polycrystalline silicon are electrically connected in parallel.
20. The semiconductor device according to claim 17 , wherein the first polycrystalline silicon and the second polycrystalline silicon are formed as continuous one body and electrically connected.