Integrated circuit packages comprising a plurality of redistribution structures and methods of forming the same
View Patent ↗Provided are integrated circuit packages and methods of forming the same. An integrated circuit package includes a plurality of integrated circuits, a first encapsulant, a first redistribution structure, a plurality of conductive pillars, a second redistribution structure, a second encapsulant and a third redistribution structure. The first encapsulant encapsulates the integrated circuits. The first redistribution structure is disposed over the first encapsulant and electrically connected to the integrated circuits. The conductive pillars are disposed over the first redistribution structure. The conductive pillars are disposed between and electrically connected to the first and second redistribution structures. The second encapsulant encapsulates the conductive pillars and is disposed between the first redistribution structure and second redistribution structure. The third redistribution structure is disposed over and electrically connected to the second redistribution structure, wherein a linewidth of the third redistribution structure is larger than a linewidth of the second redistribution structure.
1. An integrated circuit package, comprising:
an integrated circuit;
a first encapsulant, encapsulating the integrated circuit;
a first redistribution structure, disposed over the first encapsulant and electrically connected to the integrated circuit;
a second redistribution structure disposed over the first redistribution structure;
a semiconductor layer between the first redistribution structure and the second redistribution structure;
a plurality of conductive pillars disposed on the semiconductor layer and penetrating through the semiconductor layer, wherein the conductive pillars are disposed between and electrically connected to the first redistribution structure and the second redistribution structure;
a first die, wherein the first die is disposed on the semiconductor layer between the first redistribution structure and the second redistribution structure, and the first die is electrically connected to the second redistribution structure.
2. The integrated circuit package according to claim 1 , further comprising a second encapsulant, wherein the second encapsulant encapsulates the conductive pillars, the first die, the first encapsulant and the first redistribution structure.
3. The integrated circuit package according to claim 1 , wherein the integrated circuit comprises a second die and a plurality of die stacks surrounding the second die.
4. The integrated circuit package according to claim 1 , wherein the integrated circuit comprises a second die, a plurality third dies sequentially stacked on the second die and a plurality of thermal pillars on the second die aside the third dies.
5. The integrated circuit package according to claim 1 , wherein a height of the first die is substantially the same as a gap between the second redistribution structure and the semiconductor layer.
6. The integrated circuit package according to claim 1 , wherein one of the conductive pillars includes a first portion in the semiconductor layer and a second portion on the semiconductor layer, and there is no interface between the first portion and the second portion.
7. The integrated circuit package according to claim 1 , wherein a first surface of the first die is substantially flush with a surface of the semiconductor layer and a second surface opposite to the first surface of the first die is substantially flush with a surface of the second redistribution structure.
8. The integrated circuit package according to claim 1 , wherein the first die comprises a die attach film and is adhered to the semiconductor layer through the die attach film.
9. The integrated circuit package according to claim 1 , wherein the first die comprises a plurality of connectors, and surfaces of the connectors are substantially flush with a surface of the second redistribution structure.
10. The integrated circuit package according to claim 1 , wherein the first die is disposed between two adjacent ones of the conductive pillars.
11. The integrated circuit package according to claim 1 , wherein a lateral sidewall of the semiconductor layer is substantially flush with lateral sidewalls of the first redistribution structure and the first encapsulant.
12. The integrated circuit package according to claim 1 , further comprises a third redistribution structure disposed over and electrically connected to the second redistribution structure, wherein a linewidth of the third redistribution structure is larger than a linewidth of the second redistribution structure.