Chip structure with conductive pillar and method for forming the same
A chip structure is provided. The chip structure includes a substrate. The chip structure includes a first conductive line over the substrate. The chip structure includes an insulating layer over the substrate and the first conductive line. The chip structure includes a conductive pillar over and passing through the insulating layer. The conductive pillar is formed in one piece, the conductive pillar is in direct contact with the first conductive line, and a first sidewall of the first conductive line extends across a second sidewall of the conductive pillar in a top view of the first conductive line and the conductive pillar. The chip structure includes a solder bump on the conductive pillar. The solder bump is in direct contact with the conductive pillar.
1. A chip structure, comprising:
a substrate;
a first conductive line over the substrate;
an insulating layer over the substrate and the first conductive line;
a conductive pillar over and passing through the insulating layer, wherein the conductive pillar is formed in one piece, the conductive pillar extends to the first conductive line, a first sidewall of the first conductive line extends across a second sidewall of the conductive pillar in a top view of the first conductive line and the conductive pillar, the conductive pillar vertically overlaps a first portion of the first conductive line, a first linewidth of the first portion of the first conductive line is less than a width of the conductive pillar, and the first linewidth and the width are measured along an axis perpendicular to a first longitudinal axis of the first portion of the first conductive line; and
a solder bump on the conductive pillar, wherein a bottom surface of the solder bump is substantially level with a top surface of the conductive pillar.
2. The chip structure as claimed in claim 1 , wherein the conductive pillar has a lower surface and a bottom protruding portion protruding from the lower surface, the bottom protruding portion passes through the insulating layer over the first conductive line, and the bottom protruding portion has a rectangular shape in the top view of the conductive pillar and the first conductive line.
3. The chip structure as claimed in claim 2 , wherein a second longitudinal axis of the bottom protruding portion is substantially parallel to the first sidewall of the first conductive line under the conductive pillar in the top view of the conductive pillar and the first conductive line.
4. The chip structure as claimed in claim 1 , further comprising:
a second conductive line between the substrate and the conductive pillar, wherein the first conductive line is laterally spaced apart from the second conductive line, and the conductive pillar vertically overlaps the second conductive line.
5. The chip structure as claimed in claim 4 , wherein the first linewidth of the first portion of the first conductive line is greater than a second linewidth of the second conductive line, and the second linewidth is measured along the axis perpendicular to the first longitudinal axis of the first portion of the first conductive line.
6. The chip structure as claimed in claim 5 , wherein the first linewidth of the first portion of the first conductive line covered by the conductive pillar is greater than a third linewidth of a second portion of the first conductive line not covered by the conductive pillar, and the third linewidth is measured along the axis perpendicular to the first longitudinal axis of the first portion of the first conductive line.
7. The chip structure as claimed in claim 4 , wherein the first conductive line under the conductive pillar is substantially parallel to the second conductive line under the conductive pillar.
8. The chip structure as claimed in claim 1 , wherein the first conductive line is spaced apart from the second conductive line by a gap, the gap is filled with the insulating layer, and the insulating layer has a substantially flat top surface continuously extending across the first conductive line, the gap, and the second conductive line.
9. A chip structure, comprising:
a substrate;
a first conductive line over the substrate;
an insulating layer over the substrate and the first conductive line;
a conductive pillar over and passing through the insulating layer, wherein the conductive pillar is formed in one piece, the conductive pillar extends to the first conductive line, a first sidewall of the first conductive line extends across a second sidewall of the conductive pillar in a top view of the first conductive line and the conductive pillar, the conductive pillar vertically overlaps a first portion of the first conductive line, a first linewidth of the first portion of the first conductive line is less than a width of the conductive pillar, and the first linewidth and the width are measured along an axis perpendicular to a longitudinal axis of the first portion of the first conductive line;
a solder bump on the conductive pillar; and
a second conductive line between the substrate and the conductive pillar, wherein the conductive pillar vertically overlaps the second conductive line, the first conductive line is laterally spaced apart from the second conductive line, and a first top surface of the first conductive line is substantially level with a second top surface of the second conductive line.
10. The chip structure as claimed in claim 9 , wherein the first linewidth of the first portion of the first conductive line is greater than a second linewidth of the second conductive line, and the second linewidth is measured along the axis perpendicular to the longitudinal axis of the first portion of the first conductive line.
11. The chip structure as claimed in claim 10 , wherein a distance between the first conductive line and the second conductive line decreases toward the substrate.
12. The chip structure as claimed in claim 9 , wherein the conductive pillar has a lower surface and a bottom protruding portion protruding from the lower surface, the bottom protruding portion passes through the insulating layer over the first conductive line, and the bottom protruding portion has four square corners in the top view of the conductive pillar and the first conductive line.
13. The chip structure as claimed in claim 9 , wherein the first conductive line further has a second portion not covered by the conductive pillar, a first distance between the first portion of the first conductive line and the second conductive line is less than a second distance between the second portion and the second conductive line.
14. The chip structure as claimed in claim 13 , wherein the first conductive line has a first recess and a second recess, and the second portion is between the first recess and the second recess.
15. A chip structure, comprising:
a substrate;
a first conductive line over the substrate;
an insulating layer over the substrate and the first conductive line;
a conductive pillar over and passing through the insulating layer, wherein the conductive pillar is formed in one piece, the conductive pillar extends to the first conductive line, a first sidewall of the first conductive line extends across a second sidewall of the conductive pillar in a top view of the first conductive line and the conductive pillar, the conductive pillar vertically overlaps a first portion of the first conductive line, a first linewidth of the first portion of the first conductive line is less than a width of the conductive pillar, the first linewidth and the width are measured along an axis perpendicular to a longitudinal axis of the first portion of the first conductive line, and a second portion of the insulating layer between the conductive pillar and the substrate has a comb shape in a cross-sectional view of the insulating layer; and
a solder bump on the conductive pillar, wherein a bottom surface of the solder bump is substantially level with a top surface of the conductive pillar.
16. The chip structure as claimed in claim 15 , wherein the first conductive line is embedded in the second portion of the insulating layer.
17. The chip structure as claimed in claim 16 , further comprising:
a second conductive line between the substrate and the conductive pillar, wherein the first conductive line is laterally spaced apart from the second conductive line, and the conductive pillar vertically overlaps the second conductive line.
18. The chip structure as claimed in claim 17 , wherein the second conductive line is embedded in the second portion of the insulating layer.
19. The chip structure as claimed in claim 15 , wherein the insulating layer between the first conductive line and the second conductive line has an inverted trapezoid shape.
20. The chip structure as claimed in claim 15 , wherein the first conductive line further has a first recess and a second recess, the conductive pillar does not cover the first recess and the second recess, and the conductive pillar is between the first recess and the second recess.