IP Library Granted Patent US 11,199,562
Granted Patent B2
US 11,199,562 · App. 16/535,505 · Granted Dec 14, 2021

Wafer testing system including a wafer-flattening multi-zone vacuum chuck and method for operating the same

Inventors: Liang Li (Shanghai, CN); Chao Xu (Shanghai, CN)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G01R1/0408G01R31/2831H01L21/67288H01L21/6838H01L27/11556H01L27/11582
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,199,562
App. No.
16/535,505
Granted
Dec 14, 2021
Kind
B2
Abstract

A wafer testing system and a method of testing a wafer include placing a wafer on a vacuum chuck containing a plurality of vacuum zones, determining a warpage of the wafer, providing a different magnitude of vacuum suction to different vacuum zones at the same time based on the determined warpage of the wafer to reduce the warpage of the wafer, and testing the wafer.

Claims (46)

1. An apparatus, comprising:

a vacuum chuck configured to hold a wafer, wherein the vacuum chuck comprises a plurality of vacuum zones, each vacuum zone including respective vacuum suction ports; and

vacuum control instrumentation configured to individually control a magnitude of vacuum suction for each of the vacuum zones to provide a different magnitude of vacuum suction to different vacuum zones at the same time based on warpage of the wafer,

wherein the vacuum zones comprise a set of N vacuum zones located at different azimuthal angle ranges around a vertical axis passing through a geometrical center of the vacuum chuck, each vacuum zone within the set of N vacuum zones being located within a respective unique azimuthal angle range that does not overlap with azimuthal angle ranges of other vacuum zones within the set of N vacuum zones, N being an integer in a range from 2 to 200; and

wherein each vacuum zone within the set of N vacuum zone comprises a respective vacuum manifold, the respective vacuum manifold comprising:

a laterally-extending portion that laterally extends within the vacuum chuck between a top surface of the vacuum chuck and a backside surface of the vacuum chuck and vertically spaced from the top surface of the vacuum chuck and the backside surface of the vacuum chuck, and

a plurality of vacuum suction ports vertically extending from the top surface of the vacuum chuck to the laterally-extending portion and located at different azimuthal angles around the geometrical center of the vacuum chuck.

2. The apparatus of claim 1 , further comprising a wafer warpage measurement sensor configured to measure the warpage of the wafer after placement of the wafer on the vacuum chuck, wherein the wafer warpage measurement sensor is configured to measure the warpage of each portion of the wafer that overlies a respective one of the vacuum zones.

3. The apparatus of claim 2 , wherein the vacuum suction ports in each vacuum zone are connected to a respective one of independently controlled vacuum pumping lines.

4. The apparatus of claim 3 , wherein the wafer warpage measurement sensor is configured to transmit measurement data corresponding to the warpage of the wafer to the vacuum control instrumentation for each portion of the wafer that overlies a respective one of the vacuum zones.

5. The apparatus of claim 4 , wherein the vacuum control instrumentation is configured to provide a greater vacuum suction through a first independently controlled vacuum pumping line to a first vacuum zone that underlies a first portion of the wafer having a greater wafer-to-chuck distance than through a second independently controlled vacuum pumping line to a second vacuum zone that underlies a second portion of the wafer having a lesser wafer-to-chuck distance.

6. The apparatus of claim 4 , wherein:

the independently controlled vacuum pumping lines are connected to a respective one of multiple vacuum pumps; and

the vacuum control instrumentation is configured to individually control a pumping speed of each of the multiple vacuum pumps to individually control the magnitude of vacuum suction for each of the vacuum zones.

7. The apparatus of claim 4 , wherein:

the independently controlled vacuum pumping lines are connected to a common vacuum pump through a respective valve; and

the vacuum control instrumentation is configured to individually control the magnitude of vacuum suction to each of the independently controlled vacuum pumping lines by controlling a respective one of the valves.

8. The apparatus of claim 3 , wherein the vacuum control instrumentation is configured to provide greater vacuum suction to a region of the wafer that overlies a vacuum zone at which the wafer has a greater average vertical distance from a front surface of the vacuum chuck than to another region of the wafer that overlies another vacuum zone at which the wafer has a lesser average vertical distance from the front surface of the vacuum chuck.

9. The apparatus of claim 3 , wherein:

the vacuum control instrumentation is configured to apply a uniform vacuum suction to all the vacuum zones upon placement of the wafer to the vacuum chuck; and

the vacuum control instrumentation is configured to generate a pattern of non-uniform magnitude of vacuum suction across the vacuum zones based on measurement of wafer warpage by the wafer warpage measurement sensor, such that the warpage of the wafer is reduced upon application of the pattern of the non-uniform magnitude of vacuum suction to the vacuum zones.

10. The apparatus of claim 3 , wherein each of the vacuum zones includes a respective vacuum manifold that located below a top surface of the vacuum chuck, connects a respective set of vacuum suction ports, and is connected to an end of a respective one of the independently controlled vacuum pumping lines.

11. The apparatus of claim 1 , further comprising:

a tester head overlying the vacuum chuck and configured to hold a prober card in a position that faces the wafer;

a tester configured to provide test signals to the prober card and to receive measurement signals from the prober card; and

a prober interface board providing electrical connection between the tester head and the prober card, wherein the prober card is configured to electrically test semiconductor dies on the wafer.

12. A method of testing a wafer, comprising:

placing a wafer on a vacuum chuck containing a plurality of vacuum zones, wherein the plurality of vacuum zones comprises a set of N vacuum zones located at different azimuthal angle ranges around a vertical axis passing through a geometrical center of the vacuum chuck, each vacuum zone within the set of N vacuum zones being located within a respective unique azimuthal angle range that does not overlap with azimuthal angle ranges of other vacuum zones within the set of N vacuum zones, N being an integer in a range from 2 to 200; and

wherein each vacuum zone within the set of N vacuum zone comprises a respective vacuum manifold, the respective vacuum manifold comprising:

a laterally-extending portion that laterally extends within the vacuum chuck between a top surface of the vacuum chuck and a backside surface of the vacuum chuck and vertically spaced from the top surface of the vacuum chuck and the backside surface of the vacuum chuck; and

a plurality of vacuum suction ports vertically extending from the top surface of the vacuum chuck to the laterally-extending portion and located at different azimuthal angles around the geometrical center of the vacuum chuck;

determining a warpage of the wafer;

providing a different magnitude of vacuum suction to different vacuum zones at the same time based on the determined warpage of the wafer to reduce the warpage of the wafer; and

testing the wafer.

13. The method of claim 12 , wherein determining the warpage of the wafer comprises measuring the warpage of the wafer using a wafer warpage measurement sensor after placing the wafer on the vacuum chuck.

14. The method of claim 13 , wherein the wafer warpage measurement sensor measures the warpage of each portion of the wafer that overlies a respective one of the vacuum zones.

15. The method of claim 13 , further comprising providing a greater vacuum suction through a first independently controlled vacuum pumping line to a first vacuum zone that underlies a first portion of the wafer having a greater wafer-to-chuck distance than through a second independently controlled vacuum pumping line to a second vacuum zone that underlies a second portion of the wafer having a lesser wafer-to-chuck distance.

16. The method of claim 15 , wherein:

the first and the second independently controlled vacuum pumping lines are connected to respective first and second vacuum pumps; and

the method further comprises individually controlling the magnitude of vacuum suction to each of the first and the second independently controlled vacuum pumping lines by individually controlling a pumping speed of each of the first and second vacuum pumps.

17. The method of claim 15 , wherein:

the first and the second independently controlled vacuum pumping lines are connected to a common vacuum pump through respective first and second valves; and

the method further comprises individually controlling the magnitude of vacuum suction to each of the first and the second independently controlled vacuum pumping lines by controlling the first and the second valves.

18. The method of claim 12 , wherein the wafer comprises a semiconductor wafer containing a plurality of three-dimensional NAND memory devices comprising:

an alternating stack of word lines and insulating layers; and

a plurality of memory stack structures which extend through the alternating stack, each memory stack structure comprising a semiconductor channel and a memory film.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052915 FRAME 0566 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 059127/0001 →
SECURITY INTEREST Recorded Feb 6, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052915/0566 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 8, 2019
From: LI, LIANG; XU, CHAO
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 050001/0116 →
Continuity (1)
Related Publication 20210041478A1 · Feb 11, 2021
Cited By (4)
US 12,408,337 US 12,482,751 US 12,484,224 US 12,550,671