IP Library Granted Patent US 11,217,515
Granted Patent B2
US 11,217,515 · App. 16/554,980 · Granted Jan 4, 2022

Semiconductor package structures and methods of manufacture

Inventors: Stephen St. Germain (Gilbert, AZ); Jay A. Yoder (Phoenix, AZ); Dennis Lee Conner (Peoria, AZ); Frank Robert Cervantes (Laveen, AZ); Andrew Celaya (Phoenix, AZ)
Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
H01L23/49805H01L21/568H01L23/3107H01L23/49524H01L23/49562H01L23/49575H01L23/49811H01L23/49861H01L2924/0002H01L2924/181
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,217,515
App. No.
16/554,980
Granted
Jan 4, 2022
Kind
B2
Abstract

Methods of forming semiconductor packages include providing a lead frame having leads and no tie-bars. Tape is attached to the lead frame and one or more semiconductor die are coupled therewith. Electrical contacts of the die are interconnected with the leads using electrical connectors. An encapsulated assembly is formed by at least partially encapsulating the die and electrical connectors. The assembly is singulated to form a semiconductor package. The tape is detached from the package or encapsulated assembly. One or more die attach flags may be attached to the tape and the die may be attached thereto. Semiconductor packages formed using the methods include one or more semiconductor die at least partially encapsulated, pins exposed through the encapsulant, electrical connectors within the encapsulant and electrically interconnecting the pins with electrical contacts of the die, and no tie-bars coupling the die with the pins. Packages may also include die attach flags.

Claims (34)

1. A method of forming a no tie-bar semiconductor package, comprising:

providing a lead frame comprising a plurality of leads, the lead frame comprising no tie-bars;

attaching a tape to the lead frame;

coupling one or more semiconductor die with the tape, wherein the one or more semiconductor die comprises a plurality of electrical contacts;

electrically interconnecting one or more of the electrical contacts with one or more of the leads using electrical connectors;

forming an encapsulated assembly, by at least partially encapsulating the one or more semiconductor die and at least partially encapsulating each of the electrical connectors, using an encapsulant;

singulating the encapsulated assembly to form a semiconductor package; and

detaching the tape from one of the encapsulated assembly and the semiconductor package.

2. The method of claim 1 , wherein the semiconductor package comprises one of a power converter and a power controller.

3. The method of claim 1 , wherein the lead frame comprises no die attach flags.

4. The method of claim 1 , wherein the electrical connectors comprise wirebonds.

5. The method of claim 1 , further comprising attaching one or more die attach flags to the tape, wherein coupling the one or more semiconductor die with the tape comprises attaching the one or more semiconductor die to the one or more die attach flags using a die attach material.

6. The method of claim 5 , further comprising using vacuum assist to hold down the one or more die attach flags while attaching the one or more semiconductor die to the one or more die attach flags, and using vacuum assist while electrically interconnecting one or more of the electrical contacts with one or more of the leads using the electrical connectors.

7. The method of claim 1 , wherein the tape is configured to retain its shape and adhesiveness at temperatures exceeding 240 degrees Celsius.

8. The method of claim 1 , wherein the tape comprises an adhesive layer of 3 mils or less.

9. The method of claim 1 , wherein none of the electrical contacts of the one or more semiconductor die are exposed through the encapsulant of the semiconductor package.

10. The method of claim 1 , wherein the method comprises no etching step, apart from any etching used for singulation, after the one or more semiconductor die are coupled with the tape.

11. The method of claim 1 , wherein the method comprises only one encapsulating step.

12. The method of claim 1 , wherein the method comprises no sawing step, apart from any sawing used for singulation, after at least partially encapsulating the one or more semiconductor die using the encapsulant.

13. A method of forming a no tie-bar semiconductor package, comprising:

providing a lead frame comprising a plurality of leads, the lead frame comprising no tie-bars and no die attach flags;

attaching a tape to the lead frame;

attaching a plurality of die attach flags to the tape;

attaching a plurality of semiconductor die to the die attach flags using a die attach material, wherein each of the semiconductor die comprises a plurality of electrical contacts;

electrically interconnecting one or more of the electrical contacts with one or more of the leads using electrical connectors;

forming an encapsulated assembly, by at least partially encapsulating each of the semiconductor die and at least partially encapsulating each of the electrical connectors, using an encapsulant;

singulating the encapsulated assembly to form a semiconductor package; and

detaching the tape from one of the encapsulated assembly and the semiconductor package;

wherein the semiconductor package comprises a flat no-leads package.

14. The method of claim 13 , wherein the tape is configured to retain its shape and adhesiveness at temperatures exceeding 240 degrees Celsius and wherein the tape comprises an adhesive layer of 3 mils or less.

15. The method of claim 13 , wherein none of the electrical contacts of the plurality of semiconductor die are exposed through the encapsulant of the semiconductor package.

16. The method of claim 13 , wherein the method comprises no etching step, apart from any etching used for singulation, after the plurality of semiconductor die are attached to the die attach flags.

17. The method of claim 13 , wherein the method comprises only one encapsulating step.

18. The method of claim 13 , wherein the method comprises no sawing step, apart from any sawing used for singulation, after at least partially encapsulating the plurality of semiconductor die using the encapsulant.

Assignments (4)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 051145, FRAME 0062 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064079/0474 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EXCLUSION OF FAIRCHILD SEMICONDUCTOR CORPORATION OF CONVEYING PARTY PREVIOUSLY RECORDED ON REEL 051145 FRAME 0062. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Dec 3, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051170/0781 →
SECURITY INTEREST Recorded Nov 26, 2019
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 051145/0062 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 29, 2019
From: ST. GERMAIN, STEPHEN; YODER, JAY A.; CONNER, DENNIS LEE; CERVANTES, FRANK ROBERT; CELAYA, ANDREW
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 050211/0025 →
Continuity (4)
Continuation In Part 15833533 · Dec 6, 2017
Continuation 15391960 · Dec 28, 2016
Continuation 14484141 · Sep 11, 2014
Related Publication 20190385939A1 · Dec 19, 2019