IP Library Granted Patent US 11,417,771
Granted Patent B2
US 11,417,771 · App. 16/690,755 · Granted Aug 16, 2022

Composite and transistor

Inventor: Shunpei Yamazaki (Setagaya, JP)
Assignee: Semiconductor Energy Laboratory Co., Ltd.
H01L29/7869H01L23/5226H01L23/544H01L29/78648H01L29/78696H01L2223/5446
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Quick Facts
Patent No.
US 11,417,771
App. No.
16/690,755
Granted
Aug 16, 2022
Kind
B2
Abstract

A novel material is provided. A composite oxide semiconductor in which a first region and a plurality of second regions are mixed is provided. Note that the first region contains at least indium, an element M (the element M is one or more of Al, Ga, Y, and Sn), and zinc, and the plurality of second regions contain indium and zinc. Since the plurality of second regions have a higher concentration of indium than the first region, the plurality of second regions have a higher conductivity than the first region. An end portion of one of the plurality of second regions overlaps with an end portion of another one of the plurality of second regions. The plurality of second regions are three-dimensionally surrounded with the first region.

Claims (72)

1. A transistor comprising:

a gate electrode;

a gate insulating film; and

an oxide semiconductor,

wherein the oxide semiconductor comprises a first region and a second region,

wherein the first region comprises indium(In), an element M, and zinc(Zn),

wherein the element M is one or more of aluminum, gallium, yttrium, and tin,

wherein the second region comprises indium and zinc,

wherein a concentration of indium in the second region is higher than a concentration of indium in the first region, and

wherein the first region and the second region are mixed.

2. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) is 5:1:6 or a neighborhood thereof in the oxide semiconductor.

3. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the first region is 4:2:3 or a neighborhood thereof.

4. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the second region is 2:0:3 or a neighborhood thereof.

5. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) is 4:2:3 or a neighborhood thereof in the oxide semiconductor.

6. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the first region is 1:1:1 or a neighborhood thereof.

7. The transistor according to claim 1 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the second region is 2:0:1 or a neighborhood thereof.

8. A transistor comprising:

a gate electrode;

a gate insulating film; and

an oxide semiconductor,

wherein the oxide semiconductor comprises a first region and a second region,

wherein the first region comprises indium(In), an element M, and zinc(Zn),

wherein the element M is one or more of aluminum, gallium, yttrium, and tin,

wherein the second region comprises indium and zinc,

wherein a concentration of indium in the second region is higher than a concentration of indium in the first region, and

wherein the second region comprises nanocrystals in the oxide semiconductor.

9. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) is 5:1:6 or a neighborhood thereof in the oxide semiconductor.

10. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the first region is 4:2:3 or a neighborhood thereof.

11. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the second region is 2:0:3 or a neighborhood thereof.

12. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) is 4:2:3 or a neighborhood thereof in the oxide semiconductor.

13. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the first region is 1:1:1 or a neighborhood thereof.

14. The transistor according to claim 8 , wherein an atomic ratio of indium to the element M and zinc (In:M:Zn) in the second region is 2:0:1 or a neighborhood thereof.

15. A transistor comprising:

a gate electrode;

a gate insulating film; and

an oxide semiconductor,

wherein the oxide semiconductor comprises a first region and a second region,

wherein the first region comprises indium(In), an element M, and zinc(Zn),

wherein the element M is one or more of aluminum, gallium, yttrium, and tin,

wherein the second region comprises indium and zinc,

wherein a concentration of indium in the second region is 1.1 to 10 times as high as a concentration of indium in the first region,

wherein the first region and the second region are mixed, and

wherein the second region is enclosed by the first region.

16. The transistor according to claim 15 ,

wherein the concentration of indium in the second region is 2 to 10 times as high as the concentration of indium in the first region.

17. The transistor according to claim 15 ,

wherein a thickness in c-axis direction of the second region is greater than or equal to 0.1 nm and less than 1 nm.

18. The transistor according to claim 15 ,

wherein the first region is non-single-crystal.

19. The transistor according to claim 15 ,

wherein the first region comprises a crystal portion and comprises a portion where a c-axis of the crystal portion is parallel to a normal vector to a surface on which the oxide semiconductor is formed.

20. The transistor according to claim 15 ,

wherein the second region is non-single-crystal.

21. The transistor according to claim 15 ,

wherein the second region has a higher conductivity than the first region.

22. A transistor comprising:

a gate electrode;

a gate insulating film; and

an oxide semiconductor,

wherein the oxide semiconductor comprises a first region and a second region,

wherein the first region comprises indium(In), an element M, and zinc(Zn),

wherein the element M is one or more of aluminum, gallium, yttrium, and tin,

wherein the second region comprises indium and zinc,

wherein a concentration of indium in the second region is 1.1 to 10 times as high as a concentration of indium in the first region,

wherein the second region comprises nanocrystals in the oxide semiconductor, and

wherein the second region is enclosed by the first region.

23. The transistor according to claim 22 , wherein the concentration of indium in the second region is 2 to 10 times as high as the concentration of indium in the first region.

24. The transistor according to claim 22 , wherein a thickness in c-axis direction of the second region is greater than or equal to 0.1 nm and less than 1 nm.

25. The transistor according to claim 22 , wherein the first region is non-single-crystal.

26. The transistor according to claim 22 , wherein the first region comprises a crystal portion and comprises a portion where a c-axis of the crystal portion is parallel to a normal vector to a surface on which the oxide semiconductor is formed.

27. The transistor according to claim 22 , wherein the second region is non-single-crystal.

28. The transistor according to claim 22 , wherein the second region has a higher conductivity than the first region.

Priority Claims (1)
JP 2016-048802 · Mar 11, 2016 · national
Continuity (2)
Continuation 15443052 · Feb 27, 2017
Related Publication 20200091346A1 · Mar 19, 2020
Cited By (2)
US 12,283,633 US 12,349,412