IP Library Granted Patent US 11,005,034
Granted Patent B1
US 11,005,034 · App. 16/692,965 · Granted May 11, 2021

Magnetoresistive memory device including a high dielectric constant capping layer and methods of making the same

Inventors: Bhagwati Prasad (San Jose, CA); Matthew Carey (San Jose, CA); Alan Kalitsov (San Jose, CA); Bruce Terris (Sunnyvale, CA)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
H01L43/08G11C11/161G11C11/1673G11C11/1675H01F10/329H01F10/3259H01F10/3286H01L27/222H01L43/02H01L43/10
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Quick Facts
Patent No.
US 11,005,034
App. No.
16/692,965
Granted
May 11, 2021
Kind
B1
Abstract

Magnetoelectric or magnetoresistive memory cells include at least one of a high dielectric constant dielectric capping layer and/or a nonmagnetic metal dust layer located between the free layer and the dielectric capping layer.

Claims (25)

1. A method of operating a magnetoresistive memory device comprising:

providing a memory device, comprising:

a first electrode;

a second electrode;

a magnetic tunnel junction located between the first electrode and the second electrode, the magnetic tunnel junction comprising a reference layer, a free layer, and a nonmagnetic tunnel barrier layer located between the reference layer and the free layer;

a dielectric capping layer located between the second electrode and the free layer; and

a nonmagnetic metal dust layer contacting the dielectric capping layer and the free layer,

wherein the memory device comprises a spin-transfer torque (STT) magnetoresistive random access memory (MRAM) cell;

programming the MRAM cell into a first programmed state by applying a programming voltage of a first polarity such that a spin orientation in the free layer is parallel to a spin orientation of the reference layer;

programming the MRAM cell into a second programmed state by applying a programming voltage of a second polarity such that the spin orientation in the free layer is antiparallel to the spin orientation of the reference layer; and

applying a sensing voltage to the first electrode relative to the second electrode, and determining a magnitude of electrical current that tunnels through the magnetic tunnel junction,

wherein each of the positive programming voltage and the negative programming voltage has a magnitude in a range from 100 mV to 1000 mV.

2. The method of claim 1 , wherein the sensing voltage is in a range from 50 mV to 300 mV.

3. The method of claim 1 , wherein the nonmagnetic metal dust layer increases perpendicular magnetic anisotropy of the free layer.

4. The method of claim 1 , wherein the nonmagnetic metal dust layer consists essentially of at least one elemental metal.

5. The method of claim 4 , wherein the at least one elemental metal is selected from Ir, Pd, Mg, Pt, W, Ta, Hf, Pd, Ru, or Rh.

6. The method of claim 4 , wherein the at least one elemental metal is selected from Ir, Pd, Pt, W, Ta, Hf, Pd, Ru, or Rh.

7. The method of claim 4 , wherein the at least one elemental metal consists essentially of iridium.

8. The method of claim 4 , wherein the nonmagnetic metal dust layer has a thickness less than 5 monolayers of the at least one elemental metal.

9. The method of claim 1 , wherein the nonmagnetic metal dust layer is discontinuous and has sub-monolayer thickness.

10. The method of claim 1 , wherein the dielectric capping layer comprises a dielectric material selected from magnesium oxide, hafnium oxide or a ternary dielectric oxide material including at least two metal elements.

11. The method of claim 10 , wherein the dielectric capping layer consists essentially of magnesium oxide.

12. The method of claim 1 , wherein:

the dielectric capping layer has a thickness in a range from 0.2 nm to 1 nm; and

the nonmagnetic tunnel barrier layer comprises magnesium oxide and has a thickness in a range from 0.5 nm to 1.5 nm.

Assignments (11)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 10, 2023
From: KALITSOV, ALAN; PRASAD, BHAGWATI; CHOPDEKAR, RAJESH; WAN, LEI; SANTOS, TIFFANY
To: WESTERN DIGITAL TECHNOLOGIES, INC.,
Reel/Frame 063273/0462 →
RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0699 →
SECURITY INTEREST Recorded Feb 26, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052025/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2019
From: PRASAD, BHAGWATI; CAREY, MATTHEW; KALITSOV, ALAN; TERRIS, BRUCE
To: WESTERN DIGITAL TECHNOLOGIES, INC.,
Reel/Frame 051200/0031 →