IP Library › Granted Patent US 11,302,652
Granted Patent B2
US 11,302,652 · App. 16/724,179 · Granted Apr 12, 2022

Semiconductor package substrate with a smooth groove about a perimeter of a semiconductor die

Inventors: ChienHao Wang (Taipei, TW); Bob Lee (New Taipei, TW); YuhHarng Chien (Taipei, TW)
Assignee: TEXAS INSTRUMENTS INCORPORATED
H01L23/562G06T7/0004G06T7/70H01L21/4825H01L21/4842H01L21/565H01L21/681H01L23/3114H01L23/4952H01L23/49513H01L23/49541H01L23/49582G06T2207/30148
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Quick Facts
Patent No.
US 11,302,652
App. No.
16/724,179
Granted
Apr 12, 2022
Kind
B2
Abstract

A semiconductor package includes a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface. The semiconductor package further includes a semiconductor die including bond pads, and an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin. The metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic pad.

Claims (41)

1. A semiconductor package comprising:

a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface;

a semiconductor die including bond pads; and

an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin,

wherein the metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove having a surface roughness less than a surface roughness of the roughened surface of the metallic pad.

2. The semiconductor package of claim 1 , wherein the groove is configured to prevent the resin of the adhesive from bleeding onto the roughened surface of the metallic pad outside the groove.

3. The semiconductor package of claim 1 , wherein a resin bleed of the adhesive is adjacent to at least a portion of the groove.

4. The semiconductor package of claim 1 , wherein the adhesive is adjacent to at least a portion of the groove.

5. The semiconductor package of claim 1 , wherein the groove forms a rectangular shape surrounding the semiconductor die on the roughened surface.

6. The semiconductor package of claim 1 , wherein all surfaces of the metallic pad are roughened except for the groove.

7. The semiconductor package of claim 1 , wherein a surface roughness of the metallic pad is at least 1.0 micrometers (μm).

8. The semiconductor package of claim 7 , wherein a surface roughness of the groove is less than 0.5 micrometers (μm).

9. The semiconductor package of claim 1 , wherein a side of the metallic pad including the roughened surface includes one or more of a group consisting of:

a metal oxide layer;

a micro-crystalline metal layer; and

a rough nickel layer.

10. The semiconductor package of claim 1 , further including wire bonds extending between the bond pads of the semiconductor die and the leads.

11. The semiconductor package of claim 1 , further including mold compound covering the semiconductor die, the adhesive, the roughened surface of the metallic pad, and at least partially covering the leads.

12. A semiconductor package comprising:

a metallic pad and leads spaced from the metallic pad by a gap, a side of the metallic pad including a roughened surface with a pad surface roughness of 1 to 50 micrometers (μm),

wherein the metallic pad includes a planar base metal and layer of nickel plated on the base metal to form the roughened surface;

a semiconductor die including bond pads;

an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad, wherein the adhesive includes a resin,

wherein the metallic pad further includes a groove forming a rectangular shape surrounding the semiconductor die on the roughened surface, the groove having a groove surface roughness of less than 0.5 μm;

wire bonds extending between the bond pads of and the leads; and

mold compound covering the semiconductor die, the adhesive, the roughened surface of the metallic pad, and the wire bonds, and at least partially covering the leads.

13. A semiconductor package comprising:

a metallic pad and leads spaced from the metallic pad by a gap, the metallic pad including a roughened surface;

a semiconductor die including bond pads; and

an adhesive between the roughened surface of the metallic pad and the semiconductor die, therein bonding the semiconductor die to the metallic pad

wherein the metallic pad further includes a groove surrounding the semiconductor die on the roughened surface, the groove including a surface roughness less than a surface roughness of the roughened surface of the metallic pad, a portion of the adhesive in the groove.

14. The semiconductor package of claim 13 , wherein the adhesive includes a resin.

15. The semiconductor package of claim 13 , wherein the groove forms a rectangular shape surrounding the semiconductor die on the roughened surface.

16. The semiconductor package of claim 13 , wherein all surfaces of the metallic pad are roughened except for the groove.

17. The semiconductor package of claim 13 , wherein a surface roughness of the metallic pad is at least 1.0 micrometers (μm).

18. The semiconductor package of claim 13 , wherein a side of the metallic pad including the roughened surface includes one or more of a group consisting of:

a metal oxide layer;

a micro-crystalline metal layer; and

a rough nickel layer.

19. The semiconductor package of claim 13 , further including wire bonds extending between the bond pads of the semiconductor die and the leads.

20. The semiconductor package of claim 13 , further including mold compound covering the semiconductor die, the adhesive, the roughened surface of the metallic pad, and at least partially covering the leads.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 20, 2019
From: WANG, CHIENHAO; LEE, BOB; CHIEN, YUHHARNG
To: TEXAS INSTRUMENTS INCORPORATED
Reel/Frame 051350/0935 →
Continuity (1)
Related Publication 20210193590A1 · Jun 24, 2021
Cited By (2)
US 12,424,525 US 12,476,204