Press-fit power module and related methods
Implementations of semiconductor packages may include: one or more die electrically coupled to a lead frame. The lead frame may be included within a housing. The semiconductor package may also include a set of signal leads extending from the housing, a set of power leads extending from the housing, and a plurality of press fit pins each fixedly coupled to the set of signal leads and the set of power leads. The set of signal leads and the set of power leads may be configured to couple with a substrate.
1. A semiconductor package comprising:
one or more die electrically coupled to a leadframe, the leadframe comprised within a housing;
a first set of leads extending from the housing;
a second set of leads extending from the housing opposite the first set of leads; and
a plurality of press fit pins, each of the press fit pins welded, soldered, or brazed to the first set of leads and the second set of leads in a straight orientation;
wherein the plurality of press fit pins are configured to couple with a circuit board.
2. The semiconductor package of claim 1 , wherein the semiconductor package is a power module.
3. The semiconductor package of claim 1 , wherein the plurality of press fit pins are coupled to the first set of leads and the second set of leads through either one of welding, soldering, or brazing using a jig.
4. The semiconductor package of claim 1 , wherein the first set of leads comprises signal leads on a first side of the housing and the second set of leads comprises power leads on a second side of the housing opposing the first side.
5. The semiconductor package of claim 1 , wherein the leadframe comprises 99.9% purity copper.
6. The semiconductor package of claim 1 , wherein the plurality of press fit pins comprise a CuCrAgFeTiSi alloy.
7. A semiconductor package comprising:
a power module comprising:
a first set of leads coupled to the power module;
a second set of leads coupled to the power module on a side of the power module opposing the first set of leads; and
a press fit pin either one of welded, soldered, or brazed to each of the first set of leads and to each of the second set of leads in a straight orientation;
wherein the press fit pin is configured to couple with a circuit board.
8. The semiconductor package of claim 7 , wherein the power module comprises one of a switch, a rectifier, or an inverter.
9. The semiconductor package of claim 7 , wherein the press fit pin is coupled to one of the first set of leads and to one of the second set of leads through either one of welding, soldering, or brazing using a jig.
10. The semiconductor package of claim 7 , wherein the power module further comprises a leadframe comprising the first set of leads and the second set of leads.
11. The semiconductor package of claim 10 , wherein the leadframe comprises 99.9% purity copper.
12. The semiconductor package of claim 7 , wherein the press fit pin comprises a CuCrAgFeTiSi alloy.
13. The semiconductor package of claim 7 , wherein the first set of leads comprises signal leads.
14. The semiconductor package of claim 7 , wherein the second set of leads comprises power leads.
15. A semiconductor package comprising:
a leadframe comprised within a housing;
a first set of leads extending from a first side of the housing;
a second set of leads extending from a second side of the housing opposite the first side of the housing; and
a plurality of press fit pins, each of the press fit pins welded, soldered, or brazed to the first set of leads and the second set of leads in a straight orientation;
wherein the plurality of press fit pins are configured to couple with a circuit board.
16. The semiconductor package of claim 15 , wherein the semiconductor package is a power module.
17. The semiconductor package of claim 15 , wherein the plurality of press fit pins are coupled to the first set of leads and the second set of leads through either one of welding, soldering, or brazing using a jig.
18. The semiconductor package of claim 15 , wherein the first set of leads comprises signal leads and the second set of leads comprises power leads.
19. The semiconductor package of claim 15 , wherein the leadframe comprises 99.9% purity copper.
20. The semiconductor package of claim 15 , wherein the plurality of press fit pins comprise a CuCrAgFeTiSi alloy.