Dynamic predictive latency attributes
The present disclosure generally relate to dynamically changing predictive latency related attributes to increase the deterministic window (DTWIN) of operation. The host device workload characteristics as well as the memory device's current condition provide valuable information for the duration of the DTWIN. If the memory device is near the end of life, then the DTWIN duration will be smaller. Additionally, if the workload from the host device is heavy, then the DTWIN duration will also be smaller. Rather than utilizing a fixed DTWIN duration based upon worst case scenarios for host device workload and memory device condition, dynamically adjusting the DTWIN duration based upon the workload and condition will provide a DTWIN duration that can gradually decrease over time from a much longer DTWIN duration than is currently available.
1. A data storage device, comprising:
at least one memory device; and
a controller coupled to the at least one memory device, the controller configured to:
collect statistics regarding host device usage of the data storage device;
collect statistics regarding parameters of the at least one memory device;
reduce a deterministic window (DTWIN) duration for the data storage device based upon the collected statistics, wherein the DTWIN duration is a window of operation during which a deterministic latency for read operations and write operations is provided; and
deliver the DTWIN duration to at least one host device.
2. The data storage device of claim 1 , wherein the controller is further configured to change the DTWIN duration.
3. The data storage device of claim 1 , wherein the controller includes a host statistics collector that collects statistics regarding host device usage.
4. The data storage device of claim 1 , wherein the controller comprises a CPU that collects the statistics from the host device and from the at least one memory device.
5. The data storage device of claim 1 , wherein the statistics collected regarding host device usage include one or more of workload, sequential read or write composition, random read or write composition; flash translation layer (FTL) tables or address translation tables; and stream allocation.
6. The data storage device of claim 1 , wherein the statistics collected regarding the parameters of the at least one memory device include one or more of program-erase cycles, range of temperature over predetermined period of time, remaining free space, and bad block budget.
7. The data storage device of claim 1 , wherein the controller is configured to deliver the DTWIN duration upon receiving a request for DTWIN duration from at least one host device.
8. The data storage device of claim 1 , wherein the controller is further configured to analyze the statistics collected regarding host device usage and the parameters of the at least one memory device, and wherein the controller is further configured to reduce the DTWIN duration and a non-deterministic window (NDWIN) duration.
9. The data storage device of claim 1 , wherein the controller is further configured to reduce a different DTWIN duration for each host device for the at least one memory device.
10. The data storage device of claim 9 , wherein the different DTWIN duration is based upon host device usage statistics that are different for each host device.
11. The data storage device of claim 10 , wherein the different DTWIN duration is based upon identical statistics from parameters of the at least one memory device.
12. A data storage device, comprising:
a plurality of memory devices; and
a controller coupled to the plurality of memory devices, the controller configured to:
logically arrange the plurality of memory devices into a first plurality of memory device sets;
reduce a first deterministic window (DTWIN) duration for each memory device set of the first plurality of memory device sets, wherein a DTWIN duration is a window of operation during which a deterministic latency for read operations and write operations is provided;
logically rearrange the plurality of memory devices into a second plurality of memory device sets; and
reduce a second DTWIN duration for each memory device set of the second plurality of memory device sets.
13. The data storage device of claim 12 , wherein at least one DTWIN duration for the first DTWIN durations is different from at least one other DTWIN duration for the first DTWIN durations.
14. The data storage device of claim 12 , wherein at least one DTWIN duration for the first DTWIN durations is different from at least one second DTWIN duration for the second DTWIN durations.
15. The data storage device of claim 12 , wherein at least one DTWIN duration for the second DTWIN durations is different from at least one other DTWIN duration for the second DTWIN durations.
16. The data storage device of claim 12 , wherein the controller is configured to deliver the second DTWIN durations upon determining the second DTWIN durations.
17. The data storage device of claim 12 , wherein the controller is further configured to reduce the first DTWIN duration to a third DTWIN duration for at least one memory device set prior to logically rearranging the plurality of memory devices.
18. The data storage device of claim 17 , wherein the controller is further configured to deliver the third DTWIN duration to a host device.
19. A data storage device, comprising:
means to dynamically reduce a deterministic window (DTWIN) duration for at least one memory device, wherein the DTWIN duration is a window of operation during which a deterministic latency for read operations and write operations is provided; and
means to deliver the DTWIN duration to at least one host device.
20. The data storage device of claim 19 , wherein the at least one memory device is a plurality of memory devices logically arranged into a plurality of memory sets.