IP Library Granted Patent US 11,068,170
Granted Patent B2
US 11,068,170 · App. 16/751,124 · Granted Jul 20, 2021

Multi-tier scheme for logical storage management

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Quick Facts
Patent No.
US 11,068,170
App. No.
16/751,124
Granted
Jul 20, 2021
Kind
B2
Abstract

A storage device may include a controller and a memory array including a plurality of dies arranged into a plurality of channels. In some examples, the controller may be configured to define, from the memory array, a plurality of die-sets based on respective chip enable lines associated with the plurality of dies, wherein each die-set of the plurality of die-sets includes at least one die from each of the plurality of channels; define, from a selected die-set of the plurality of die-sets, a plurality of blocksets, wherein each blockset includes a block from each die of the selected die-set; receive a unit of data to be stored; and issue commands that cause the unit of data to be stored in blocks of a selected blockset of the plurality of blocksets.

Claims (41)

1. A method, comprising:

determining a first number of device-sets to be concurrently active, wherein a memory comprises a plurality of memory devices, and each device-set comprises at least one memory device; and

issuing one or more commands of a first command type to a first set of device-sets, wherein the first set of device-sets has a first quantity of device-sets, wherein the first quantity does not exceed the first number.

2. The method of claim 1 , wherein the plurality of memory devices are arranged into a plurality of channels, and wherein each device-set comprises at least one memory device from each of the plurality of channels.

3. The method of claim 2 , wherein each of the plurality of memory devices comprises a plurality of blocks, wherein each blockset comprises a block from each memory device of a respective device-set, and wherein the issuing comprises issuing the one or more commands of the first command type to a blockset in each of the first set of device-sets.

4. The method of claim 1 , further comprising:

determining a second number of device-sets to be concurrently active; and

issuing one or more commands of a second command type to a second set of device-sets,

wherein the second set of device-sets has a second quantity of device-sets, wherein the second quantity does not exceed the second number, and

wherein the second command type is different from the first command type.

5. The method of claim 4 , wherein the one or more commands of the first command type are issued during a first time period, and the one or more commands of the second command type are issued during a second time period different from the first time period.

6. The method of claim 4 , wherein the second number is different from the first number.

7. The method of claim 4 , wherein the first command type is one of a write command, a read command, or an erase command, and wherein the second command type is one of a write command, a read command, or an erase command and is different from the first command type.

8. The method of claim 4 , wherein the determining the first number of device-sets comprises determining the first number of device-sets based on the first command type, and wherein the determining the second number of device-sets comprises determining the second number of device-sets based on the second command type.

9. The method of claim 4 , wherein the determining the first number of device-sets comprises determining the first number of device-sets based on a power consumption budget for the plurality of memory devices, and wherein the determining the second number of device-sets comprises determining the second number of device-sets based on a power consumption budget for the plurality of memory devices.

10. The method of claim 4 , wherein the determining the first number of device-sets comprises determining the first number of device-sets based on a throughput performance target for a storage device, and wherein the determining the second number of device-sets comprises determining the second number of device-sets based on a throughput performance target for the storage device.

11. A data storage device, comprising:

a memory comprising a plurality of memory devices; and

a controller configured to cause:

determining a first number of device-sets to be concurrently active, wherein each device-set comprises at least one memory device; and

issuing one or more commands of a first command type to a first set of device-sets, wherein the first set of device-sets has a first quantity of device-sets, wherein the first quantity does not exceed the first number.

12. The data storage device of claim 11 , wherein the plurality of memory devices are arranged into a plurality of channels, and wherein each device-set comprises at least one memory device from each of the plurality of channels.

13. The data storage device of claim 12 , wherein each of the plurality of memory devices comprises a plurality of blocks, wherein each blockset comprises a block from each memory device of a respective device-set, and wherein the issuing comprises issuing the one or more commands of the first command type to a blockset in each of the first set of device-sets.

14. The data storage device of claim 11 , wherein the controller is configured to cause:

determining a second number of device-sets to be concurrently active; and

issuing one or more commands of a second command type to a second set of device-sets,

wherein the second set of device-sets has a second quantity of device-sets, wherein the second quantity does not exceed the second number, and

wherein the second command type is different from the first command type.

15. The data storage device of claim 14 , wherein the controller is configured to cause issuing the one or more commands of the first command type during a first time period, and the controller is configured to cause issuing the one or more commands of the second command type during a second time period different from the first time period.

16. The data storage device of claim 14 , wherein the second number is different from the first number, wherein the first command type is one of a write command, a read command, or an erase command, and wherein the second command type is one of a write command, a read command, or an erase command and is different from the first command type.

17. A data storage device, comprising:

a memory comprising a plurality of memory devices;

means for determining a first number of device-sets to be concurrently active, wherein each device-set comprises at least one memory device; and

means for issuing one or more commands of a first command type to a first set of device-sets, wherein the first set of device-sets has a first quantity of device-sets, wherein the first quantity does not exceed the first number.

18. The data storage device of claim 17 , wherein the plurality of memory devices are arranged into a plurality of channels, and wherein each device-set comprises at least one memory device from each of the plurality of channels.

19. The data storage device of claim 18 , wherein each of the plurality of memory devices comprises a plurality of blocks, wherein each blockset comprises a block from each memory device of a respective device-set, and wherein the means for issuing comprises means for issuing the one or more commands of the first command type to a blockset in each of the first set of device-sets.

20. The data storage device of claim 17 , further comprising:

means for determining a second number of device-sets to be concurrently active; and

means for issuing one or more commands of a second command type to a second set of device-sets,

wherein the second set of device-sets has a second quantity of device-sets, wherein the second quantity does not exceed the second number, and

wherein the second command type is different from the first command type.

Assignments (11)
SECURITY AGREEMENT (SUPPLEMENTAL) Recorded Nov 14, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 069411/0208 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2024
From: SANDISK TECHNOLOGIES, INC.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 069168/0273 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
RELEASE OF SECURITY INTEREST AT REEL 052025 FRAME 0088 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0699 →
SECURITY INTEREST Recorded Feb 26, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 052025/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: ARTNAK, GEORGE G., JR.; LIU, HAINING; PAVLENKO, YURIY
To: HGST NETHERLANDS B.V.
Reel/Frame 051882/0764 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2020
From: HGST NETHERLANDS B.V.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 051986/0001 →