IP Library Granted Patent US 11,385,984
Granted Patent B2
US 11,385,984 · App. 16/798,650 · Granted Jul 12, 2022

Variable read scan for solid-state storage device quality of service

Inventors: Nian Yang (Mountain View, CA); Piyush Dhotre (San Jose, CA); Sahil Sharma (San Jose, CA)
Assignee: Western Digital Technologies, Inc.
G06F11/3058G06F1/206G06F9/4881G06F11/076G06F11/106G06F11/1072G06F11/142G06F11/3037G06F12/0882
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Quick Facts
Patent No.
US 11,385,984
App. No.
16/798,650
Granted
Jul 12, 2022
Kind
B2
Abstract

A method and apparatus for dynamically determining when, or how often, to do a read scan operation on a solid-state storage drive. One solution adjusts a read scan interval as part of performing a read scan operation. First, a bit error rate is determined for one of a plurality of storage blocks of a non-volatile memory array. Then, a cross temperature metric for the storage block is determined. A read scan interval is changed in response to the cross temperature metric satisfying a cross temperature threshold. Then, data in the storage block is relocated to a free storage block in response to the bit error rate satisfying a relocation threshold.

Claims (55)

1. A method, comprising:

determining a bit error rate for a storage block of a plurality of storage blocks of a non-volatile memory array;

determining a cross temperature metric for the storage block;

changing a read scan interval in response to the cross temperature metric for the storage block satisfying a cross temperature threshold; and

relocating data of the storage block to a free storage block in response to the bit error rate satisfying a relocation threshold.

2. The method of claim 1 , wherein the non-volatile memory array comprises a plurality of memory die, each memory die comprising a temperature sensor, the method further comprising:

determining that the storage block comprises a hottest memory die of the plurality of memory die based on a die temperature reported by each temperature sensor; and

changing a read scan interval in response to determining that the storage block comprises the hottest memory die.

3. The method of claim 2 , further comprising scheduling a read scan operation to start with the storage block when the read scan operation next executes.

4. The method of claim 2 , further comprising cooling the hottest memory die such that the die temperature drops to below a data retention die temperature threshold.

5. The method of claim 1 , determining a bit error rate for the storage block comprises sampling one or more logical pages of storage cells of the storage block, the sampled one or more logical pages of storage cells representative of the bit error rate for the storage block.

6. The method of claim 1 , wherein relocating data of the storage block comprises initiating a data scrub operation by a storage controller managing the non volatile memory array.

7. The method of claim 1 , wherein changing the read scan interval comprises reducing the read scan interval.

8. An apparatus, comprising:

a read scanner configured to read data from a storage block of a plurality of storage blocks of a non-volatile memory array comprising a plurality of memory die, each memory die comprising a temperature sensor;

an error correction code decoder configured to determine a bit error rate for the data read by the read scanner;

a health manager configured to determine that the storage block spans a hottest memory die of the plurality of memory die based on a die temperature reported by each temperature sensor;

a data mover configured to move data of the storage block to a free storage block in response to the bit error rate satisfying a read bit error rate threshold; and

wherein the read scanner is configured to reduce a read scan interval for a read scan operation in response to determining that the storage block spans the hottest memory die.

9. The apparatus of claim 8 , further comprising a cross temperature manager configured to:

determine a cross temperature metric for the storage block; and

reduce a read scan interval in response to the cross temperature metric for the storage block satisfying a cross temperature threshold.

10. The apparatus of claim 8 , further comprising an adjustment module configured to:

iteratively attempt to read data of the storage block using a predetermined number of different read levels; and

in response to successfully reading the data of the storage block via a last of the predetermined number of different read levels in the iterative attempts, determine a bit error rate for the data of the storage block read and reduce the read scan interval in response to the bit error rate satisfying the read bit error rate threshold.

11. The apparatus of claim 10 , wherein the adjustment module is further configured to schedule the read scan operation to start with the storage block when the read scan operation next executes.

12. The apparatus of claim 8 , further comprising a storage controller configured to cool the hottest memory die of the plurality of memory die.

13. The apparatus of claim 12 , wherein the storage controller cools the hottest memory die by directing incoming write commands to one or more storage block that do not include the hottest memory die.

14. The apparatus of claim 12 , wherein the storage controller cools the hottest memory die by directing the data mover to move data for each storage block that spans the hottest memory die to another plurality of storage blocks and temporarily stop using the hottest memory die such that the hottest memory die cools due to nonuse.

15. An apparatus, comprising:

a plurality of storage blocks;

a storage controller configured to:

determine a storage block of the plurality of storage blocks having a bit error rate above a read bit error rate threshold;

iteratively read data of the storage block using a predetermined number of different read levels;

in response to successfully reading the data of the storage block via the iterative reads, changing one or more read levels of the storage block to one or more of the predetermined number of different read levels used to successfully read the data of the storage block; and

increase a read scan frequency of the plurality of storage blocks in response to changing the one or more read levels; and

a cross temperature manager configured to:

determine a cross temperature metric for the storage block; and

change the read scan frequency in response to the cross temperature metric for the storage block satisfying a cross temperature threshold.

16. The apparatus of claim 15 , wherein the cross temperature manager determines the cross temperature metric by:

determining a write temperature for the data of the storage block;

determining a current temperature for the storage block; and

setting the cross temperature metric as a difference between the write temperature and the current temperature.

17. An apparatus, comprising:

a plurality of storage blocks;

a storage controller configured to:

determine a storage block of the plurality of storage blocks having a bit error rate above a read bit error rate threshold, wherein each storage block of the plurality of storage blocks spans a plurality of memory die;

iteratively read data of the storage block using a predetermined number of different read levels;

in response to successfully reading the data of the storage block via the iterative reads, changing one or more read levels of the storage block to one or more of the predetermined number of different read levels used to successfully read the data of the storage block; and

increase a read scan frequency of the plurality of storage blocks in response to changing the one or more read levels; and

a health manager configured to:

in response to iteratively attempting to read the data of the storage block, determine that the storage block comprises a hottest memory die of the plurality of memory die based on a die temperature for each memory die the storage block spans; and

change the read scan frequency in response to determining that the storage block comprises the hottest memory die.

18. The apparatus of claim 17 , wherein the health manager is further configured to queue the storage block that includes the hottest memory die as a next storage block for a subsequent read scan operation.

19. The apparatus of claim 17 , wherein the storage controller is configured to reconfigure the storage block to exclude the hottest memory die.

Assignments (10)
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 053482 FRAME 0453 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0279 →
SECURITY INTEREST Recorded May 14, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053482/0453 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2020
From: YANG, NIAN; SHARMA, SAHIL; DHOTRE, PIYUSH
To: WESTERN DIGITAL TECHNOLOGIES INC.
Reel/Frame 052206/0942 →