IP Library Granted Patent US 10,923,178
Granted Patent B1
US 10,923,178 · App. 16/802,638 · Granted Feb 16, 2021

Data storage with improved write performance for preferred user data

Inventor: Refael Ben-Rubi (Rosh Haayin, IL)
Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.
G11C11/4085G06F13/1673G11C8/12G11C11/4093G11C11/5628G11C11/5642
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Quick Facts
Patent No.
US 10,923,178
App. No.
16/802,638
Granted
Feb 16, 2021
Kind
B1
Abstract

The present disclosure generally relates to enhanced write performance by taking into consideration user write performance preferences as well as enhanced post write read (EPWR) scheduling. The user provides the write performance preferences to the data storage device. When a write operation happens, the data storage device checks the write performance preference for the current LBA as well as the write performance preference for the previous LBA. The data storage device will also check whether the current word line is scheduled for EPWR. Based upon the write performance preferences for the LBAs and the EPWR scheduling, the data can be written out of order to meet the user's write performance preferences. If the data is written out of order, the flash translation layer (FLT) is informed of the switch.

Claims (39)

1. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, the controller configured to:

receive user write performance preference data for two or more logical block addresses (LBAs) to be written;

receive a first write command for a first LBA of the two or more LBAs;

receive a second write command for a second LBA of the two or more LBAs, wherein a flash translation layer (FLT) maps LBAs to word lines;

determine whether current word line of the memory device is a word line that needs enhanced post write read (EPWR); and

write the second LBA to the current word line, wherein the first LBA remains in a buffer while the second LBA is written.

2. The data storage device of claim 1 , wherein the second LBA has a write performance preference that is higher than the write performance preference for the first LBA.

3. The data storage device of claim 2 , wherein the current word line needs EPWR.

4. The data storage device of claim 3 , wherein the current word line does not need EPWR and wherein the next word line needs EPWR.

5. The data storage device of claim 1 , wherein the user write preferences are stored in RAM.

6. The data storage device of claim 1 , wherein the controller is further configured to update a translation table of the flash translation layer (FTL) regarding the second LBA being written prior to the first LBA.

7. The data storage device of claim 1 , wherein the controller is further configured to write the first LBA to another word line of the memory device and perform EPWR on the written first LBA.

8. A data storage device, comprising:

a memory device; and

a controller coupled to the memory device, the controller configured to:

determine whether a first LBA of a plurality of LBAs has a write performance preference;

determine whether a second LBA of the plurality of LBAs have a write performance preference;

determine whether a current word line of the memory device needs enhanced post write read (EPWR); and

determine whether to write the second LBA to the current word line prior to writing the first LBA to the memory device.

9. The data storage device of claim 8 , wherein the controller is configured to determine that the first LBA has a preferred write performance preference.

10. The data storage device of claim 9 , wherein the controller is configured to determine that the second LBA does not have a write performance preference.

11. The data storage device of claim 10 , wherein the controller is configured to determine that the current word line needs EPWR.

12. The data storage device of claim 11 , wherein the controller is configured to write the second LBA to the current word line with EPWR.

13. The data storage device of claim 8 , wherein the controller is configured to determine that the first LBA does not have a preferred write performance preference.

14. The data storage device of claim 13 , wherein the controller is configured to determine that the second LBA has a write performance preference.

15. The data storage device of claim 14 , wherein the controller is configured to determine that the current word line needs EPWR.

16. The data storage device of claim 15 , wherein the controller is configured to write the first LBA to the current word line with EPWR.

17. A data storage device, comprising:

a memory device;

means to determine whether LBAs have write performance preferences;

means to determine whether a current word line of the memory device needs enhanced post write read (EPWR); and

means to write LBAs to the current word line out of order based upon write performance preferences.

18. The data storage device of claim 17 , further comprising means to update a translation table of a flash translation layer (FTL) based upon the means to write LBAs to the current word line out of order.

19. The data storage device of claim 17 , further comprising:

means to receive user write performance preferences for LBAs; and

means to store user write performance preferences for LBAs.

20. The data storage device of claim 17 , wherein the means to write LBAs to the current word line out of order is also based upon whether the current word line of the memory device needs EPWR.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 053482 FRAME 0453 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0279 →
SECURITY INTEREST Recorded May 14, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053482/0453 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 27, 2020
From: BEN-RUBI, REFAEL
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 052045/0499 →