Method and apparatus for adapting a variable impedance network

1. A device, comprising:

first and second variable capacitors on a single die, wherein each end of the first and second variable capacitors has an accessible external port;

a third variable capacitor and an inductor connected in series, forming a component having a first end and a second end respectively connected to the first and second variable capacitors; and

a switchable element connected in parallel with the inductor,

wherein the first, second and third variable capacitors and the inductor form a variable-Pi circuit topology having a first configuration in which the switchable element is in an open position and a second configuration in which the switchable element is in a closed position and forms a shunt around the inductor.

2. The device of claim 1 , wherein the device forms a tunable impedance matching network operating in the first configuration while tuned to a first frequency band and operating in the second configuration while tuned to a second frequency band having higher frequencies than in the first frequency band.

3. The device of claim 1 , wherein the third variable capacitor is located on the die.

4. The device of claim 1 , wherein the die comprises a semiconductor die or a MEMS die, and wherein the switchable element is located on the die.

5. The device of claim 1 , wherein the first and second variable capacitors comprise an array of tunable switched capacitors adapted to have non-uniform quality (Q) factors.

6. The device of claim 1 , wherein a first end and a second end of the first variable capacitor have a first accessible external port and a second accessible external port respectively, wherein a first end and a second end of the second variable capacitor have a third accessible external port and a fourth accessible external port respectively, and wherein each of the first, second, third and fourth accessible external ports are different external ports.

7. The device of claim 1 , wherein at least one of the first or second variable capacitors is a voltage or current tunable capacitor comprising barium strontium titanate.

8. The device of claim 1 , wherein a plurality of the devices are utilized in a corresponding plurality of RF paths, wherein the plurality of RF paths correspond to at least one of high or low band RF paths.

9. A device, comprising:

a first variable capacitor and a second variable capacitor on a single die, wherein each end of the first and second variable capacitors has an accessible external port;

a first inductor and a second inductor connected in parallel with the first variable capacitor and the second variable capacitor respectively, the first inductor and the second inductor located external to the die;

a third variable capacitor and a third inductor connected in series, forming a component having a first end and a second end respectively connected to the first and second variable capacitors; and

a switchable element connected in parallel with the third inductor,

wherein the device forms a tunable impedance matching network having a first configuration in which the switchable element is in an open position and a second configuration in which the switchable element is in a closed position and forms a shunt around the third inductor.

10. The device of claim 9 , wherein the tunable impedance matching network operates in the first configuration while tuned to a first frequency band and operates in the second configuration while tuned to a second frequency band having higher frequencies than in the first frequency band.

11. The device of claim 9 , wherein the third variable capacitor and the switchable element are located on the die.

12. The device of claim 9 , wherein the switchable element is connected in parallel with the third inductor, thereby forming a shunt around the third inductor when the tunable impedance matching network is in the second configuration.

13. The device of claim 9 , wherein the die comprises a semiconductor die or a MEMS die.

14. The device of claim 9 , wherein a plurality of the devices are utilized in a corresponding plurality of RF paths, wherein the plurality of RF paths correspond to at least one of high or low band RF paths.

15. A device comprising:

a tunable array of switched capacitors comprising a plurality of capacitors coupled to a plurality of switches, wherein each of the plurality of capacitors has a fixed capacitance value, at least some of the fixed capacitance values of the plurality of capacitors are different, the first capacitor of the plurality of capacitors has a largest capacitance value, and each of the plurality of switches has a resistance associated therewith,

wherein the plurality of switches and the plurality of capacitors, other than the first capacitor of the plurality of capacitors, are located on a single die,

wherein the single die has a plurality of ports comprising a first port connected to the first capacitor, a second port separate from the first port and connected to the plurality of capacitors, and a third port connected to the plurality of switches,

wherein the first port is connected to a first terminal of the first capacitor and the second port is connected to a second terminal of the first capacitor external to the single die,

the array thereby being configurable in a first configuration including the first capacitor and providing a first tuning range and a second configuration excluding the first capacitor and providing a second tuning range.

16. The device of claim 15 , wherein the array of switched capacitors is adapted to have non-uniform quality (Q) factors, the array of switched capacitors thereby adapted to maintain a Q factor for the array over a predetermined operating frequency range of the device.

17. The device of claim 15 , wherein the capacitance values of the plurality of capacitors comprise a binary array.

18. The device of claim 15 , wherein the resistance associated with at least one switch of the plurality of switches comprises a parasitic resistance.

19. The device of claim 15 , wherein at least one switch of the plurality of switches comprises a semiconductor switch.

20. The device of claim 15 , wherein at least one switch of the plurality of switches comprises a micro-electro-mechanical systems (MEMS) switch.