Scrambling using different scrambling seeds for defect reduction and improved programming efficiency
Aspects of a storage device including a memory and a controller are provided which allow for efficient programming of cells on word lines using different scrambling seeds. The controller attempts to program cells of the memory by applying data scrambled using a first scrambling seed to the word line. If this attempt to program fails, the controller scrambles the data using a second, different scrambling seed and attempts to program the cells by applying the re-scrambled data to the word line. If this re-attempt also fails, the word line is listed. Then when the controller receives other data, the controller performs a final programming attempt with the other data scrambled using the second scrambling seed. If this further attempt fails, the controller identifies the block including the failed word line as a GBB. Thus, fewer GBBs may be incorrectly identified, reducing DPPM and improving memory yield of the storage device.
1. A storage device, comprising:
a memory including a plurality of memory cells coupled to a word line;
a controller configured to receive data from a host device, to scramble the data using a first scrambling seed, and to attempt to program the plurality of memory cells by applying the data scrambled using the first scrambling seed to the word line;
wherein, in response to the attempt to program the plurality of memory cells using the first scrambling seed failing, the controller is further configured to scramble the data using a second scrambling seed that is different than the first scrambling seed, and to attempt to program the plurality of memory cells by applying the data scrambled using the second scrambling seed to the word line;
wherein the memory includes additional memory cells coupled to an additional word line; and wherein in response to the attempt to program the plurality of memory cells using the second scrambling seed succeeding, the controller is further configured to attempt to program the additional memory cells by applying the data scrambled using the first scrambling seed to the additional word line.
2. The storage device of claim 1 , wherein in response to the attempt to program the plurality of memory cells using the second scrambling seed failing, the controller is further configured to add the word line to a list of word lines.
3. The storage device of claim 2 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to attempt to program the additional memory cells by applying the data scrambled using the first scrambling seed to the additional word line after adding the word line to the list of word lines.
4. The storage device of claim 2 , wherein the controller is further configured to receive other data from the host device, to determine whether the word line is in the list of word lines, and to attempt to program the plurality of memory cells by applying the other data scrambled using the second scrambling seed to the word line when the word line is in the list of word lines.
5. The storage device of claim 4 , wherein the memory comprises a block including the plurality of memory cells coupled to the word line; and wherein the controller is further configured to identify the block as a bad block in response to the attempt to program the plurality of memory cells with the other data using the second scrambling seed failing.
6. The storage device of claim 2 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to receive other data from the host device, to determine whether the additional word line is in the list of word lines, and to attempt to program the additional memory cells by applying the other data scrambled using the first scrambling seed to the additional word line when the additional word line is not in the list of word lines.
7. A storage device, comprising:
a memory including a plurality of memory cells coupled to a word line;
a controller configured to receive data from a host device, and to attempt to program the plurality of memory cells by applying the data scrambled using a first scrambling seed to the word line;
wherein the controller is further configured to receive other data from the host device, and, in response to the attempt to program the plurality of memory cells using the first scrambling seed failing, to attempt to program the plurality of memory cells after the plurality of memory cells are erased by applying the other data scrambled using a second scrambling seed different than the first scrambling seed to the word line.
8. The storage device of claim 7 , wherein, in response to the attempt to program the plurality of memory cells using the first scrambling seed failing, the controller is further configured to attempt to program the plurality of memory cells by applying the data scrambled using the second scrambling seed to the word line before receiving the other data.
9. The storage device of claim 8 , wherein in response to the attempt to program the plurality of memory cells using the second scrambling seed failing, the controller is further configured to add the word line to a list of word lines before receiving the other data.
10. The storage device of claim 9 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to attempt to program the additional memory cells by applying the data scrambled using the first scrambling seed to the additional word line after adding the word line to the list of word lines and before receiving the other data.
11. The storage device of claim 9 , wherein the controller is further configured to determine whether the word line is in the list of word lines after receiving the other data, and to attempt to program the plurality of memory cells by applying the other data scrambled using the second scrambling seed to the word line when the word line is in the list of word lines.
12. The storage device of claim 11 , wherein the memory comprises a block including the plurality of memory cells coupled to the word line; and wherein the controller is further configured to identify the block as a grown bad block (GBB) in response to the attempt to program the plurality of memory cells with the other data using the second scrambling seed failing.
13. The storage device of claim 9 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to determine whether the additional word line is in the list of word lines after receiving the other data, and to attempt to program the additional memory cells by applying the other data scrambled using the first scrambling seed to the additional word line when the additional word line is not in the list of word lines.
14. A storage device, comprising:
a memory comprising a block including a plurality of memory cells coupled to a word line;
a controller configured to attempt to program the plurality of memory cells by applying data scrambled using a first scrambling seed to the word line;
wherein the controller is further configured to receive other data from a host device, and in response to the attempt to program the plurality of memory cells using the first scrambling seed failing, to attempt to program the plurality of memory cells by applying the other data scrambled using a second scrambling seed different than the first scrambling seed to the word line; and
wherein the controller is further configured to identify the block as a bad block in response to the attempt to program the plurality of memory cells with the other data using the second scrambling seed failing.
15. The storage device of claim 14 , wherein, in response to the attempt to program the plurality of memory cells using the first scrambling seed failing, the controller is further configured to attempt to program the plurality of memory cells by applying the data scrambled using the second scrambling seed to the word line before identifying the block as the bad block.
16. The storage device of claim 15 , wherein in response to the attempt to program the plurality of memory cells using the second scrambling seed failing, the controller is further configured to add the word line to a list of word lines before identifying the block as the bad block.
17. The storage device of claim 16 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to attempt to program the additional memory cells by applying the data scrambled using the first scrambling seed to the additional word line after adding the word line to the list of word lines and before identifying the block as the bad block.
18. The storage device of claim 16 , wherein the controller is further configured to determine whether the word line is in the list of word lines before identifying the block as the bad block, and to attempt to program the plurality of memory cells by applying the other data scrambled using the second scrambling seed to the word line when the word line is in the list of word lines.
19. The storage device of claim 16 , wherein the memory includes additional memory cells coupled to an additional word line; and wherein the controller is further configured to determine whether the additional word line is in the list of word lines before identifying the block as the bad block, and to attempt to program the additional memory cells by applying the other data scrambled using the first scrambling seed to the additional word line when the additional word line is not in the list of word lines.