IP Library Granted Patent US 11,194,482
Granted Patent B1
US 11,194,482 · App. 16/890,246 · Granted Dec 7, 2021

Storage system and method for segregating outliers in a virtualization system

Inventor: Dinesh Kumar Agarwal (Karnataka, IN)
Assignee: Western Digital Technologies, Inc.
G06F3/0619G06F3/064G06F3/0631G06F3/0664G06F3/0679G06F9/45558G06F2009/45579G06F2009/45583
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Quick Facts
Patent No.
US 11,194,482
App. No.
16/890,246
Granted
Dec 7, 2021
Kind
B1
Abstract

A storage system and method for segregating outliers in a virtualization system are presented. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to track a write amplification caused by each of a plurality of virtual machines; determine that a write amplification of one of the plurality of virtual machines is outside of an acceptable write amplification range; and perform a corrective action to reduce write amplification of the one of the plurality of virtual machines. Other embodiments are provided.

Claims (33)

1. A storage system comprising:

a memory; and

a controller configured to communicate with the memory and further configured to:

track a write amplification caused by each of a plurality of virtual machines;

determine that a write amplification of one of the plurality of virtual machines is outside of an acceptable write amplification range;

perform a corrective action to reduce write amplification of the one of the plurality of virtual machines; and

notify a host that the write amplification of the one of the plurality of virtual machines is outside of the acceptable write amplification range.

2. The storage system of claim 1 , wherein the corrective action is performed independent of the host.

3. The storage system of claim 1 , wherein the corrective action comprises allocating a spare block to reduce write amplification of the one of the plurality of virtual machines.

4. The storage system of claim 1 , wherein the corrective action comprises changing an endurance group in the memory.

5. The storage system of claim 1 , wherein the controller is further configured to segregate a block storing data from the one of the plurality of virtual machines from other blocks in the memory.

6. The storage system of claim 5 , wherein the segregated block stores data from another one of the plurality of virtual machines.

7. The storage system of claim 6 , wherein the controller is further configured to invalidate the data.

8. The storage system of claim 6 , wherein the controller is further configured to move the data.

9. The storage system of claim 1 , wherein the controller is further configured to track write amplification by tracking valid host data written in the memory and storage-system-generated data written in the memory.

10. The storage system of claim 1 , wherein the controller is further configured to determine the acceptable write amplification range from the tracked write amplifications.

11. The storage system of claim 1 , wherein the memory comprises a three-dimensional memory.

12. The storage system of claim 1 , wherein the memory is configured to be integrated in the storage system.

13. The storage system of claim 1 , wherein the corrective action is triggered by the host.

14. A method comprising:

performing the following in a storage system comprising a memory:

determining that a write amplification of one of a plurality of virtual hosts is greater than a threshold; and

in response to determining that the write amplification of the one of the plurality of virtual hosts is greater than the threshold, reducing the write amplification of the one of the plurality of virtual hosts;

wherein reducing the write amplification is triggered by a host running the plurality of virtual hosts after the storage system notifies the host that the write amplification of the one of the plurality of virtual hosts is greater than the threshold.

15. The method of claim 14 , wherein reducing the write amplification is performed by the storage system without interaction with the host.

16. The method of claim 14 , wherein the write amplification is reduced by allocating a spare block.

17. The method of claim 14 , further comprising segregating a block storing data from the one of the plurality of hosts from other blocks in the memory.

18. The method of claim 14 , wherein the write amplification is reduced by changing an endurance group in the memory.

19. The method of claim 14 , wherein the memory comprises a three-dimensional memory.

20. A storage system comprising:

a memory;

means for performing a corrective action to reduce write amplification of one of a plurality of virtual machines whose write amplification is outside of an acceptable write amplification range; and

means for segregating a block storing data from the one of the plurality of virtual machines from other blocks in the memory.

Assignments (10)
PARTIAL RELEASE OF SECURITY INTERESTS Recorded Apr 25, 2025
From: JPMORGAN CHASE BANK, N.A., AS AGENT
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 071382/0001 →
SECURITY AGREEMENT Recorded Apr 25, 2025
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 071050/0001 →
PATENT COLLATERAL AGREEMENT Recorded Aug 23, 2024
From: SANDISK TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS THE AGENT
Reel/Frame 068762/0494 →
CHANGE OF NAME Recorded Jun 27, 2024
From: SANDISK TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067982/0032 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 29, 2024
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: SANDISK TECHNOLOGIES, INC.
Reel/Frame 067567/0682 →
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 053926 FRAME 0446 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058966/0321 →
SECURITY INTEREST Recorded Sep 29, 2020
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 053926/0446 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2020
From: AGARWAL, DINESH KUMAR
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 052811/0087 →