IP Library › Granted Patent US 10,969,548
Granted Patent B2
US 10,969,548 · App. 16/894,120 · Granted Apr 6, 2021

Single-layer and multi-layer structures for integrated silicon photonics optical gyroscopes

Inventors: Mario Paniccia (Santa Clara, CA); Avi Feshali (Los Angeles, CA)
Assignee: Anello Photonics, Inc.
G02B6/136G01C19/04G02B2006/12035G02B2006/12176G02B2006/12197
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Quick Facts
Patent No.
US 10,969,548
App. No.
16/894,120
Granted
Apr 6, 2021
Kind
B2
Abstract

Disclosed herein are configurations and methods to produce very low loss waveguide structures, which can be single-layer or multi-layer. These waveguide structures can be used as a sensing component of a small-footprint integrated optical gyroscope. By using pure fused silica substrates as both top and bottom cladding around a SiN waveguide core, the propagation loss can be well below 0.1 db/meter. Low-loss waveguide-based gyro coils may be patterned in the shape of a spiral (circular or rectangular or any other shape), that may be distributed among one or more of vertical planes to increase the length of the optical path while avoiding the increased loss caused by intersecting waveguides in the state-of-the-art designs. Low-loss adiabatic tapers may be used for a coil formed in a single layer where an output waveguide crosses the turns of the spiraling coil.

Claims (14)

1. A waveguide structure comprising a trench in a first fused silica wafer filled with a silicon nitride (SiN) core, wherein the first fused silica wafer is bonded to a second fused silica wafer after the trench is filled, the waveguide structure created by:

etching the trench in the first fused silica wafer, wherein the first fused silica wafer acts as a first cladding;

filling in the etched trench of the first fused silica wafer with SiN to form the SiN core; and

bonding the second fused silica wafer to the first fused silica wafer after the SiN core is formed therein, wherein the second fused silica wafer acts as a second cladding, wherein the second cladding is adjacent to the first cladding, and wherein the first cladding and the second cladding collectively completely surround the SiN core from the top, bottom and sides.

2. The waveguide structure of claim 1 , wherein dimensions and shape of the etched trench are designed according to target dimensions and shape of the SiN core.

3. The waveguide structure of claim 1 , wherein the SiN core is formed by depositing a SiN layer to fill the trench, and following the deposition by polishing the SiN layer down to a top surface of the first fused silica wafer.

4. The waveguide structure of claim 3 , wherein the polishing is performed by chemical mechanical polishing (CMP) technique.

5. The waveguide structure of claim 3 , wherein the polished top surface of the first fused silica wafer is pre-cleaned before interfacing with a bonding surface of the second fused silica wafer.

6. The waveguide structure of claim 3 , wherein a bonding between the first fused silica wafer and the second fused silica wafer is done by activation of bonding surfaces by oxygen plasma followed by a thermo-mechanical process.

7. The waveguide structure of claim 3 , wherein a bonding between the first fused silica wafer and the second fused silica wafer is done by anodic bonding.

8. The waveguide structure of claim 1 , wherein the waveguide structure is part of a waveguide chip that is used as a rotation sensing unit of an optical gyroscope.

9. The waveguide structure of claim 8 , wherein the waveguide chip comprises an input end of the waveguide structure to receive light from a light source, an output end of the waveguide structure to get light out, and a loop enclosing an area, wherein the light propagates within the loop.

10. The waveguide structure of claim 9 , wherein the loop is distributed among one or more planes in the waveguide chip, each plane having a respective core surrounded by corresponding claddings.

11. The waveguide structure of claim 10 , wherein the respective core in each plane is created by etching a respective trench in a fused silica wafer and filling the respective trench with SiN.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2020
From: PANICCIA, MARIO; FESHALI, AVI
To: ANELLO PHOTONICS, INC.
Reel/Frame 052855/0711 →
Continuity (4)
Provisional Application 62986379 · Mar 6, 2020
Provisional Application 62896365 · Sep 5, 2019
Provisional Application 62858588 · Jun 7, 2019
Related Publication 20200386944A1 · Dec 10, 2020
Cited By (5)
US 12,248,175 US 12,298,136 US 12,422,258 US 12,460,931 US 12,736,748